Lines Matching refs:ib
760 struct amdgpu_ib *ib, in sdma_v4_0_ring_emit_ib() argument
771 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v4_0_ring_emit_ib()
772 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v4_0_ring_emit_ib()
773 amdgpu_ring_write(ring, ib->length_dw); in sdma_v4_0_ring_emit_ib()
1483 struct amdgpu_ib ib; in sdma_v4_0_ring_test_ib() local
1497 memset(&ib, 0, sizeof(ib)); in sdma_v4_0_ring_test_ib()
1499 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v4_0_ring_test_ib()
1503 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v4_0_ring_test_ib()
1505 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v4_0_ring_test_ib()
1506 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v4_0_ring_test_ib()
1507 ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0); in sdma_v4_0_ring_test_ib()
1508 ib.ptr[4] = 0xDEADBEEF; in sdma_v4_0_ring_test_ib()
1509 ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v4_0_ring_test_ib()
1510 ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v4_0_ring_test_ib()
1511 ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v4_0_ring_test_ib()
1512 ib.length_dw = 8; in sdma_v4_0_ring_test_ib()
1514 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in sdma_v4_0_ring_test_ib()
1532 amdgpu_ib_free(adev, &ib, NULL); in sdma_v4_0_ring_test_ib()
1550 static void sdma_v4_0_vm_copy_pte(struct amdgpu_ib *ib, in sdma_v4_0_vm_copy_pte() argument
1556 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v4_0_vm_copy_pte()
1558 ib->ptr[ib->length_dw++] = bytes - 1; in sdma_v4_0_vm_copy_pte()
1559 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v4_0_vm_copy_pte()
1560 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v4_0_vm_copy_pte()
1561 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v4_0_vm_copy_pte()
1562 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v4_0_vm_copy_pte()
1563 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v4_0_vm_copy_pte()
1578 static void sdma_v4_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in sdma_v4_0_vm_write_pte() argument
1584 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v4_0_vm_write_pte()
1586 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v4_0_vm_write_pte()
1587 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v4_0_vm_write_pte()
1588 ib->ptr[ib->length_dw++] = ndw - 1; in sdma_v4_0_vm_write_pte()
1590 ib->ptr[ib->length_dw++] = lower_32_bits(value); in sdma_v4_0_vm_write_pte()
1591 ib->ptr[ib->length_dw++] = upper_32_bits(value); in sdma_v4_0_vm_write_pte()
1608 static void sdma_v4_0_vm_set_pte_pde(struct amdgpu_ib *ib, in sdma_v4_0_vm_set_pte_pde() argument
1614 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE); in sdma_v4_0_vm_set_pte_pde()
1615 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in sdma_v4_0_vm_set_pte_pde()
1616 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v4_0_vm_set_pte_pde()
1617 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in sdma_v4_0_vm_set_pte_pde()
1618 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in sdma_v4_0_vm_set_pte_pde()
1619 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in sdma_v4_0_vm_set_pte_pde()
1620 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in sdma_v4_0_vm_set_pte_pde()
1621 ib->ptr[ib->length_dw++] = incr; /* increment size */ in sdma_v4_0_vm_set_pte_pde()
1622 ib->ptr[ib->length_dw++] = 0; in sdma_v4_0_vm_set_pte_pde()
1623 ib->ptr[ib->length_dw++] = count - 1; /* number of entries */ in sdma_v4_0_vm_set_pte_pde()
1632 static void sdma_v4_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in sdma_v4_0_ring_pad_ib() argument
1638 pad_count = (-ib->length_dw) & 7; in sdma_v4_0_ring_pad_ib()
1641 ib->ptr[ib->length_dw++] = in sdma_v4_0_ring_pad_ib()
1645 ib->ptr[ib->length_dw++] = in sdma_v4_0_ring_pad_ib()
2519 static void sdma_v4_0_emit_copy_buffer(struct amdgpu_ib *ib, in sdma_v4_0_emit_copy_buffer() argument
2525 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v4_0_emit_copy_buffer()
2528 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v4_0_emit_copy_buffer()
2529 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v4_0_emit_copy_buffer()
2530 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in sdma_v4_0_emit_copy_buffer()
2531 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in sdma_v4_0_emit_copy_buffer()
2532 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v4_0_emit_copy_buffer()
2533 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v4_0_emit_copy_buffer()
2546 static void sdma_v4_0_emit_fill_buffer(struct amdgpu_ib *ib, in sdma_v4_0_emit_fill_buffer() argument
2551 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL); in sdma_v4_0_emit_fill_buffer()
2552 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v4_0_emit_fill_buffer()
2553 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v4_0_emit_fill_buffer()
2554 ib->ptr[ib->length_dw++] = src_data; in sdma_v4_0_emit_fill_buffer()
2555 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v4_0_emit_fill_buffer()