Lines Matching refs:ib
426 struct amdgpu_ib *ib, in sdma_v5_0_ring_emit_ib() argument
445 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v5_0_ring_emit_ib()
446 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v5_0_ring_emit_ib()
447 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_0_ring_emit_ib()
1069 struct amdgpu_ib ib; in sdma_v5_0_ring_test_ib() local
1078 memset(&ib, 0, sizeof(ib)); in sdma_v5_0_ring_test_ib()
1083 ib.gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset); in sdma_v5_0_ring_test_ib()
1084 ib.ptr = (void *)amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset); in sdma_v5_0_ring_test_ib()
1102 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v5_0_ring_test_ib()
1109 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_0_ring_test_ib()
1111 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v5_0_ring_test_ib()
1112 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v5_0_ring_test_ib()
1113 ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0); in sdma_v5_0_ring_test_ib()
1114 ib.ptr[4] = 0xDEADBEEF; in sdma_v5_0_ring_test_ib()
1115 ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v5_0_ring_test_ib()
1116 ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v5_0_ring_test_ib()
1117 ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v5_0_ring_test_ib()
1118 ib.length_dw = 8; in sdma_v5_0_ring_test_ib()
1120 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in sdma_v5_0_ring_test_ib()
1145 amdgpu_ib_free(adev, &ib, NULL); in sdma_v5_0_ring_test_ib()
1164 static void sdma_v5_0_vm_copy_pte(struct amdgpu_ib *ib, in sdma_v5_0_vm_copy_pte() argument
1170 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v5_0_vm_copy_pte()
1172 ib->ptr[ib->length_dw++] = bytes - 1; in sdma_v5_0_vm_copy_pte()
1173 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v5_0_vm_copy_pte()
1174 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v5_0_vm_copy_pte()
1175 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v5_0_vm_copy_pte()
1176 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v5_0_vm_copy_pte()
1177 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v5_0_vm_copy_pte()
1192 static void sdma_v5_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in sdma_v5_0_vm_write_pte() argument
1198 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_0_vm_write_pte()
1200 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v5_0_vm_write_pte()
1201 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v5_0_vm_write_pte()
1202 ib->ptr[ib->length_dw++] = ndw - 1; in sdma_v5_0_vm_write_pte()
1204 ib->ptr[ib->length_dw++] = lower_32_bits(value); in sdma_v5_0_vm_write_pte()
1205 ib->ptr[ib->length_dw++] = upper_32_bits(value); in sdma_v5_0_vm_write_pte()
1222 static void sdma_v5_0_vm_set_pte_pde(struct amdgpu_ib *ib, in sdma_v5_0_vm_set_pte_pde() argument
1228 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE); in sdma_v5_0_vm_set_pte_pde()
1229 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in sdma_v5_0_vm_set_pte_pde()
1230 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v5_0_vm_set_pte_pde()
1231 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in sdma_v5_0_vm_set_pte_pde()
1232 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in sdma_v5_0_vm_set_pte_pde()
1233 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in sdma_v5_0_vm_set_pte_pde()
1234 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in sdma_v5_0_vm_set_pte_pde()
1235 ib->ptr[ib->length_dw++] = incr; /* increment size */ in sdma_v5_0_vm_set_pte_pde()
1236 ib->ptr[ib->length_dw++] = 0; in sdma_v5_0_vm_set_pte_pde()
1237 ib->ptr[ib->length_dw++] = count - 1; /* number of entries */ in sdma_v5_0_vm_set_pte_pde()
1247 static void sdma_v5_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in sdma_v5_0_ring_pad_ib() argument
1253 pad_count = (-ib->length_dw) & 0x7; in sdma_v5_0_ring_pad_ib()
1256 ib->ptr[ib->length_dw++] = in sdma_v5_0_ring_pad_ib()
1260 ib->ptr[ib->length_dw++] = in sdma_v5_0_ring_pad_ib()
1840 static void sdma_v5_0_emit_copy_buffer(struct amdgpu_ib *ib, in sdma_v5_0_emit_copy_buffer() argument
1846 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v5_0_emit_copy_buffer()
1849 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v5_0_emit_copy_buffer()
1850 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v5_0_emit_copy_buffer()
1851 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in sdma_v5_0_emit_copy_buffer()
1852 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in sdma_v5_0_emit_copy_buffer()
1853 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v5_0_emit_copy_buffer()
1854 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v5_0_emit_copy_buffer()
1867 static void sdma_v5_0_emit_fill_buffer(struct amdgpu_ib *ib, in sdma_v5_0_emit_fill_buffer() argument
1872 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL); in sdma_v5_0_emit_fill_buffer()
1873 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v5_0_emit_fill_buffer()
1874 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v5_0_emit_fill_buffer()
1875 ib->ptr[ib->length_dw++] = src_data; in sdma_v5_0_emit_fill_buffer()
1876 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v5_0_emit_fill_buffer()