Lines Matching refs:RREG32
60 return RREG32(mmVCE_RB_RPTR); in vce_v2_0_ring_get_rptr()
62 return RREG32(mmVCE_RB_RPTR2); in vce_v2_0_ring_get_rptr()
77 return RREG32(mmVCE_RB_WPTR); in vce_v2_0_ring_get_wptr()
79 return RREG32(mmVCE_RB_WPTR2); in vce_v2_0_ring_get_wptr()
105 uint32_t status = RREG32(mmVCE_LMI_STATUS); in vce_v2_0_lmi_clean()
122 uint32_t status = RREG32(mmVCE_STATUS); in vce_v2_0_firmware_loaded()
151 tmp = RREG32(mmVCE_CLOCK_GATING_A); in vce_v2_0_init_cg()
157 tmp = RREG32(mmVCE_UENC_CLOCK_GATING); in vce_v2_0_init_cg()
162 tmp = RREG32(mmVCE_CLOCK_GATING_B); in vce_v2_0_init_cg()
208 return !(RREG32(mmSRBM_STATUS2) & SRBM_STATUS2__VCE_BUSY_MASK); in vce_v2_0_is_idle()
294 status = RREG32(mmVCE_LMI_STATUS); in vce_v2_0_stop()
315 tmp = RREG32(mmVCE_CLOCK_GATING_B); in vce_v2_0_set_sw_cg()
319 tmp = RREG32(mmVCE_UENC_CLOCK_GATING); in vce_v2_0_set_sw_cg()
323 tmp = RREG32(mmVCE_UENC_REG_CLOCK_GATING); in vce_v2_0_set_sw_cg()
329 tmp = RREG32(mmVCE_CLOCK_GATING_B); in vce_v2_0_set_sw_cg()
334 tmp = RREG32(mmVCE_UENC_CLOCK_GATING); in vce_v2_0_set_sw_cg()
339 tmp = RREG32(mmVCE_UENC_REG_CLOCK_GATING); in vce_v2_0_set_sw_cg()
352 tmp = RREG32(mmVCE_CLOCK_GATING_B); in vce_v2_0_set_dyn_cg()
365 orig = tmp = RREG32(mmVCE_UENC_CLOCK_GATING); in vce_v2_0_set_dyn_cg()
371 orig = tmp = RREG32(mmVCE_UENC_REG_CLOCK_GATING); in vce_v2_0_set_dyn_cg()