Lines Matching defs:cik_mqd
27 struct cik_mqd { struct
28 uint32_t header;
29 uint32_t compute_dispatch_initiator;
30 uint32_t compute_dim_x;
31 uint32_t compute_dim_y;
32 uint32_t compute_dim_z;
33 uint32_t compute_start_x;
34 uint32_t compute_start_y;
35 uint32_t compute_start_z;
36 uint32_t compute_num_thread_x;
37 uint32_t compute_num_thread_y;
38 uint32_t compute_num_thread_z;
39 uint32_t compute_pipelinestat_enable;
40 uint32_t compute_perfcount_enable;
41 uint32_t compute_pgm_lo;
42 uint32_t compute_pgm_hi;
43 uint32_t compute_tba_lo;
44 uint32_t compute_tba_hi;
45 uint32_t compute_tma_lo;
46 uint32_t compute_tma_hi;
47 uint32_t compute_pgm_rsrc1;
48 uint32_t compute_pgm_rsrc2;
49 uint32_t compute_vmid;
50 uint32_t compute_resource_limits;
51 uint32_t compute_static_thread_mgmt_se0;
52 uint32_t compute_static_thread_mgmt_se1;
53 uint32_t compute_tmpring_size;
54 uint32_t compute_static_thread_mgmt_se2;
55 uint32_t compute_static_thread_mgmt_se3;
56 uint32_t compute_restart_x;
57 uint32_t compute_restart_y;
58 uint32_t compute_restart_z;
59 uint32_t compute_thread_trace_enable;
60 uint32_t compute_misc_reserved;
61 uint32_t compute_user_data_0;
62 uint32_t compute_user_data_1;
63 uint32_t compute_user_data_2;
64 uint32_t compute_user_data_3;
65 uint32_t compute_user_data_4;
66 uint32_t compute_user_data_5;
67 uint32_t compute_user_data_6;
68 uint32_t compute_user_data_7;
69 uint32_t compute_user_data_8;
70 uint32_t compute_user_data_9;
71 uint32_t compute_user_data_10;
72 uint32_t compute_user_data_11;
73 uint32_t compute_user_data_12;
74 uint32_t compute_user_data_13;
75 uint32_t compute_user_data_14;
76 uint32_t compute_user_data_15;
77 uint32_t cp_compute_csinvoc_count_lo;
78 uint32_t cp_compute_csinvoc_count_hi;
79 uint32_t cp_mqd_base_addr_lo;
80 uint32_t cp_mqd_base_addr_hi;
81 uint32_t cp_hqd_active;
82 uint32_t cp_hqd_vmid;
83 uint32_t cp_hqd_persistent_state;
84 uint32_t cp_hqd_pipe_priority;
85 uint32_t cp_hqd_queue_priority;
86 uint32_t cp_hqd_quantum;
87 uint32_t cp_hqd_pq_base_lo;
88 uint32_t cp_hqd_pq_base_hi;
89 uint32_t cp_hqd_pq_rptr;
90 uint32_t cp_hqd_pq_rptr_report_addr_lo;
91 uint32_t cp_hqd_pq_rptr_report_addr_hi;
92 uint32_t cp_hqd_pq_wptr_poll_addr_lo;
93 uint32_t cp_hqd_pq_wptr_poll_addr_hi;
94 uint32_t cp_hqd_pq_doorbell_control;
95 uint32_t cp_hqd_pq_wptr;
96 uint32_t cp_hqd_pq_control;
97 uint32_t cp_hqd_ib_base_addr_lo;
98 uint32_t cp_hqd_ib_base_addr_hi;
99 uint32_t cp_hqd_ib_rptr;
100 uint32_t cp_hqd_ib_control;
101 uint32_t cp_hqd_iq_timer;
102 uint32_t cp_hqd_iq_rptr;
103 uint32_t cp_hqd_dequeue_request;
104 uint32_t cp_hqd_dma_offload;
105 uint32_t cp_hqd_sema_cmd;
106 uint32_t cp_hqd_msg_type;
107 uint32_t cp_hqd_atomic0_preop_lo;
108 uint32_t cp_hqd_atomic0_preop_hi;
109 uint32_t cp_hqd_atomic1_preop_lo;
110 uint32_t cp_hqd_atomic1_preop_hi;
111 uint32_t cp_hqd_hq_status0;
112 uint32_t cp_hqd_hq_control0;
113 uint32_t cp_mqd_control;
114 uint32_t cp_mqd_query_time_lo;
115 uint32_t cp_mqd_query_time_hi;
116 uint32_t cp_mqd_connect_start_time_lo;
117 uint32_t cp_mqd_connect_start_time_hi;
118 uint32_t cp_mqd_connect_end_time_lo;
119 uint32_t cp_mqd_connect_end_time_hi;
120 uint32_t cp_mqd_connect_end_wf_count;
121 uint32_t cp_mqd_connect_end_pq_rptr;
122 uint32_t cp_mqd_connect_end_pq_wptr;
123 uint32_t cp_mqd_connect_end_ib_rptr;
124 uint32_t reserved_96;
125 uint32_t reserved_97;
126 uint32_t reserved_98;
127 uint32_t reserved_99;
128 uint32_t iqtimer_pkt_header;
129 uint32_t iqtimer_pkt_dw0;
130 uint32_t iqtimer_pkt_dw1;
131 uint32_t iqtimer_pkt_dw2;
132 uint32_t iqtimer_pkt_dw3;
133 uint32_t iqtimer_pkt_dw4;
134 uint32_t iqtimer_pkt_dw5;
135 uint32_t iqtimer_pkt_dw6;
136 uint32_t reserved_108;
137 uint32_t reserved_109;
138 uint32_t reserved_110;
139 uint32_t reserved_111;
140 uint32_t queue_doorbell_id0;
141 uint32_t queue_doorbell_id1;
142 uint32_t queue_doorbell_id2;
143 uint32_t queue_doorbell_id3;
144 uint32_t queue_doorbell_id4;
145 uint32_t queue_doorbell_id5;
146 uint32_t queue_doorbell_id6;
147 uint32_t queue_doorbell_id7;
148 uint32_t queue_doorbell_id8;
149 uint32_t queue_doorbell_id9;
150 uint32_t queue_doorbell_id10;
151 uint32_t queue_doorbell_id11;
152 uint32_t queue_doorbell_id12;
153 uint32_t queue_doorbell_id13;
154 uint32_t queue_doorbell_id14;
155 uint32_t queue_doorbell_id15;