Lines Matching refs:dsc_cfg
98 const struct drm_dsc_config *dsc_cfg) in drm_dsc_pps_payload_pack() argument
110 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
117 dsc_cfg->line_buf_depth | in drm_dsc_pps_payload_pack()
118 dsc_cfg->bits_per_component << DSC_PPS_BPC_SHIFT; in drm_dsc_pps_payload_pack()
122 ((dsc_cfg->bits_per_pixel & DSC_PPS_BPP_HIGH_MASK) >> in drm_dsc_pps_payload_pack()
124 dsc_cfg->vbr_enable << DSC_PPS_VBR_EN_SHIFT | in drm_dsc_pps_payload_pack()
125 dsc_cfg->simple_422 << DSC_PPS_SIMPLE422_SHIFT | in drm_dsc_pps_payload_pack()
126 dsc_cfg->convert_rgb << DSC_PPS_CONVERT_RGB_SHIFT | in drm_dsc_pps_payload_pack()
127 dsc_cfg->block_pred_enable << DSC_PPS_BLOCK_PRED_EN_SHIFT; in drm_dsc_pps_payload_pack()
131 (dsc_cfg->bits_per_pixel & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
141 pps_payload->pic_height = cpu_to_be16(dsc_cfg->pic_height); in drm_dsc_pps_payload_pack()
144 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width); in drm_dsc_pps_payload_pack()
147 pps_payload->slice_height = cpu_to_be16(dsc_cfg->slice_height); in drm_dsc_pps_payload_pack()
150 pps_payload->slice_width = cpu_to_be16(dsc_cfg->slice_width); in drm_dsc_pps_payload_pack()
153 pps_payload->chunk_size = cpu_to_be16(dsc_cfg->slice_chunk_size); in drm_dsc_pps_payload_pack()
157 ((dsc_cfg->initial_xmit_delay & in drm_dsc_pps_payload_pack()
163 (dsc_cfg->initial_xmit_delay & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
167 cpu_to_be16(dsc_cfg->initial_dec_delay); in drm_dsc_pps_payload_pack()
173 dsc_cfg->initial_scale_value; in drm_dsc_pps_payload_pack()
177 cpu_to_be16(dsc_cfg->scale_increment_interval); in drm_dsc_pps_payload_pack()
181 ((dsc_cfg->scale_decrement_interval & in drm_dsc_pps_payload_pack()
187 (dsc_cfg->scale_decrement_interval & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
193 dsc_cfg->first_line_bpg_offset; in drm_dsc_pps_payload_pack()
197 cpu_to_be16(dsc_cfg->nfl_bpg_offset); in drm_dsc_pps_payload_pack()
201 cpu_to_be16(dsc_cfg->slice_bpg_offset); in drm_dsc_pps_payload_pack()
205 cpu_to_be16(dsc_cfg->initial_offset); in drm_dsc_pps_payload_pack()
208 pps_payload->final_offset = cpu_to_be16(dsc_cfg->final_offset); in drm_dsc_pps_payload_pack()
211 pps_payload->flatness_min_qp = dsc_cfg->flatness_min_qp; in drm_dsc_pps_payload_pack()
214 pps_payload->flatness_max_qp = dsc_cfg->flatness_max_qp; in drm_dsc_pps_payload_pack()
217 pps_payload->rc_model_size = cpu_to_be16(dsc_cfg->rc_model_size); in drm_dsc_pps_payload_pack()
224 dsc_cfg->rc_quant_incr_limit0; in drm_dsc_pps_payload_pack()
228 dsc_cfg->rc_quant_incr_limit1; in drm_dsc_pps_payload_pack()
237 dsc_cfg->rc_buf_thresh[i]; in drm_dsc_pps_payload_pack()
246 cpu_to_be16((dsc_cfg->rc_range_params[i].range_min_qp << in drm_dsc_pps_payload_pack()
248 (dsc_cfg->rc_range_params[i].range_max_qp << in drm_dsc_pps_payload_pack()
250 (dsc_cfg->rc_range_params[i].range_bpg_offset)); in drm_dsc_pps_payload_pack()
254 pps_payload->native_422_420 = dsc_cfg->native_422 | in drm_dsc_pps_payload_pack()
255 dsc_cfg->native_420 << DSC_PPS_NATIVE_420_SHIFT; in drm_dsc_pps_payload_pack()
259 dsc_cfg->second_line_bpg_offset; in drm_dsc_pps_payload_pack()
263 cpu_to_be16(dsc_cfg->nsl_bpg_offset); in drm_dsc_pps_payload_pack()
267 cpu_to_be16(dsc_cfg->second_line_offset_adj); in drm_dsc_pps_payload_pack()