Lines Matching refs:timing_base
98 unsigned int timing_base; member
118 .timing_base = 0x0,
124 .timing_base = 0x0,
130 .timing_base = 0x20000,
138 .timing_base = 0x0,
148 .timing_base = 0x20000,
160 .timing_base = 0x20000,
461 void __iomem *timing_base = ctx->regs + ctx->driver_data->timing_base; in fimd_setup_trigger() local
463 u32 val = readl(timing_base + TRIGCON); in fimd_setup_trigger()
476 writel(val, timing_base + TRIGCON); in fimd_setup_trigger()
484 void *timing_base = ctx->regs + driver_data->timing_base; in fimd_commit() local
496 writel(val, timing_base + I80IFCONFAx(0)); in fimd_commit()
499 writel(0, timing_base + I80IFCONFBx(0)); in fimd_commit()
521 writel(vidcon1, ctx->regs + driver_data->timing_base + VIDCON1); in fimd_commit()
531 writel(val, ctx->regs + driver_data->timing_base + VIDTCON0); in fimd_commit()
541 writel(val, ctx->regs + driver_data->timing_base + VIDTCON1); in fimd_commit()
545 writel(ctx->vidout_con, timing_base + VIDOUT_CON); in fimd_commit()
575 writel(val, ctx->regs + driver_data->timing_base + VIDTCON2); in fimd_commit()
991 void *timing_base = ctx->regs + driver_data->timing_base; in fimd_trigger() local
1004 reg = readl(timing_base + TRIGCON); in fimd_trigger()
1006 writel(reg, timing_base + TRIGCON); in fimd_trigger()