Lines Matching refs:intel_dp
323 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_max_lane_count() local
326 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in cdv_intel_dp_max_lane_count()
327 max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; in cdv_intel_dp_max_lane_count()
341 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_max_link_bw() local
342 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; in cdv_intel_dp_max_link_bw()
379 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_vdd_on() local
382 if (intel_dp->panel_on) { in cdv_intel_edp_panel_vdd_on()
393 msleep(intel_dp->panel_power_up_delay); in cdv_intel_edp_panel_vdd_on()
414 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_on() local
417 if (intel_dp->panel_on) in cdv_intel_edp_panel_on()
430 intel_dp->panel_on = false; in cdv_intel_edp_panel_on()
432 intel_dp->panel_on = true; in cdv_intel_edp_panel_on()
433 msleep(intel_dp->panel_power_up_delay); in cdv_intel_edp_panel_on()
442 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_off() local
451 intel_dp->panel_on = false; in cdv_intel_edp_panel_off()
466 msleep(intel_dp->panel_power_cycle_delay); in cdv_intel_edp_panel_off()
493 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_backlight_off() local
503 msleep(intel_dp->backlight_off_delay); in cdv_intel_edp_backlight_off()
511 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_mode_valid() local
516 if (is_edp(encoder) && intel_dp->panel_fixed_mode) { in cdv_intel_dp_mode_valid()
517 if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay) in cdv_intel_dp_mode_valid()
519 if (mode->vdisplay > intel_dp->panel_fixed_mode->vdisplay) in cdv_intel_dp_mode_valid()
570 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_aux_ch() local
571 uint32_t output_reg = intel_dp->output_reg; in cdv_intel_dp_aux_ch()
751 struct cdv_intel_dp *intel_dp = container_of(adapter, in cdv_intel_dp_i2c_aux_ch() local
754 struct gma_encoder *encoder = intel_dp->encoder; in cdv_intel_dp_i2c_aux_ch()
847 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_i2c_init() local
852 intel_dp->algo.running = false; in cdv_intel_dp_i2c_init()
853 intel_dp->algo.address = 0; in cdv_intel_dp_i2c_init()
854 intel_dp->algo.aux_ch = cdv_intel_dp_i2c_aux_ch; in cdv_intel_dp_i2c_init()
856 memset(&intel_dp->adapter, '\0', sizeof (intel_dp->adapter)); in cdv_intel_dp_i2c_init()
857 intel_dp->adapter.owner = THIS_MODULE; in cdv_intel_dp_i2c_init()
858 intel_dp->adapter.class = I2C_CLASS_DDC; in cdv_intel_dp_i2c_init()
859 strncpy (intel_dp->adapter.name, name, sizeof(intel_dp->adapter.name) - 1); in cdv_intel_dp_i2c_init()
860 intel_dp->adapter.name[sizeof(intel_dp->adapter.name) - 1] = '\0'; in cdv_intel_dp_i2c_init()
861 intel_dp->adapter.algo_data = &intel_dp->algo; in cdv_intel_dp_i2c_init()
862 intel_dp->adapter.dev.parent = connector->base.kdev; in cdv_intel_dp_i2c_init()
866 ret = i2c_dp_aux_add_bus(&intel_dp->adapter); in cdv_intel_dp_i2c_init()
897 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_mode_fixup() local
905 if (is_edp(intel_encoder) && intel_dp->panel_fixed_mode) { in cdv_intel_dp_mode_fixup()
906 cdv_intel_fixed_panel_mode(intel_dp->panel_fixed_mode, adjusted_mode); in cdv_intel_dp_mode_fixup()
907 refclock = intel_dp->panel_fixed_mode->clock; in cdv_intel_dp_mode_fixup()
916 intel_dp->link_bw = bws[clock]; in cdv_intel_dp_mode_fixup()
917 intel_dp->lane_count = lane_count; in cdv_intel_dp_mode_fixup()
918 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); in cdv_intel_dp_mode_fixup()
921 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
929 intel_dp->lane_count = max_lane_count; in cdv_intel_dp_mode_fixup()
930 intel_dp->link_bw = bws[max_clock]; in cdv_intel_dp_mode_fixup()
931 adjusted_mode->clock = cdv_intel_dp_link_clock(intel_dp->link_bw); in cdv_intel_dp_mode_fixup()
934 intel_dp->link_bw, intel_dp->lane_count, in cdv_intel_dp_mode_fixup()
1000 struct cdv_intel_dp *intel_dp; in cdv_intel_dp_set_m_n() local
1006 intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_set_m_n()
1008 lane_count = intel_dp->lane_count; in cdv_intel_dp_set_m_n()
1011 lane_count = intel_dp->lane_count; in cdv_intel_dp_set_m_n()
1042 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_mode_set() local
1045 intel_dp->DP = DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in cdv_intel_dp_mode_set()
1046 intel_dp->DP |= intel_dp->color_range; in cdv_intel_dp_mode_set()
1049 intel_dp->DP |= DP_SYNC_HS_HIGH; in cdv_intel_dp_mode_set()
1051 intel_dp->DP |= DP_SYNC_VS_HIGH; in cdv_intel_dp_mode_set()
1053 intel_dp->DP |= DP_LINK_TRAIN_OFF; in cdv_intel_dp_mode_set()
1055 switch (intel_dp->lane_count) { in cdv_intel_dp_mode_set()
1057 intel_dp->DP |= DP_PORT_WIDTH_1; in cdv_intel_dp_mode_set()
1060 intel_dp->DP |= DP_PORT_WIDTH_2; in cdv_intel_dp_mode_set()
1063 intel_dp->DP |= DP_PORT_WIDTH_4; in cdv_intel_dp_mode_set()
1066 if (intel_dp->has_audio) in cdv_intel_dp_mode_set()
1067 intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; in cdv_intel_dp_mode_set()
1069 memset(intel_dp->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE); in cdv_intel_dp_mode_set()
1070 intel_dp->link_configuration[0] = intel_dp->link_bw; in cdv_intel_dp_mode_set()
1071 intel_dp->link_configuration[1] = intel_dp->lane_count; in cdv_intel_dp_mode_set()
1076 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in cdv_intel_dp_mode_set()
1077 (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) { in cdv_intel_dp_mode_set()
1078 intel_dp->link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; in cdv_intel_dp_mode_set()
1079 intel_dp->DP |= DP_ENHANCED_FRAMING; in cdv_intel_dp_mode_set()
1084 intel_dp->DP |= DP_PIPEB_SELECT; in cdv_intel_dp_mode_set()
1086 REG_WRITE(intel_dp->output_reg, (intel_dp->DP | DP_PORT_EN)); in cdv_intel_dp_mode_set()
1087 DRM_DEBUG_KMS("DP expected reg is %x\n", intel_dp->DP); in cdv_intel_dp_mode_set()
1108 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_sink_dpms() local
1112 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in cdv_intel_dp_sink_dpms()
1170 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_dpms() local
1172 uint32_t dp_reg = REG_READ(intel_dp->output_reg); in cdv_intel_dp_dpms()
1231 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_get_link_status() local
1234 intel_dp->link_status, in cdv_intel_dp_get_link_status()
1276 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_get_adjust_train() local
1281 for (lane = 0; lane < intel_dp->lane_count; lane++) { in cdv_intel_get_adjust_train()
1282 uint8_t this_v = cdv_intel_get_adjust_request_voltage(intel_dp->link_status, lane); in cdv_intel_get_adjust_train()
1283 uint8_t this_p = cdv_intel_get_adjust_request_pre_emphasis(intel_dp->link_status, lane); in cdv_intel_get_adjust_train()
1298 intel_dp->train_set[lane] = v | p; in cdv_intel_get_adjust_train()
1335 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_channel_eq_ok() local
1340 lane_align = cdv_intel_dp_link_status(intel_dp->link_status, in cdv_intel_channel_eq_ok()
1344 for (lane = 0; lane < intel_dp->lane_count; lane++) { in cdv_intel_channel_eq_ok()
1345 lane_status = cdv_intel_get_lane_status(intel_dp->link_status, lane); in cdv_intel_channel_eq_ok()
1359 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_set_link_train() local
1361 REG_WRITE(intel_dp->output_reg, dp_reg_value); in cdv_intel_dp_set_link_train()
1362 REG_READ(intel_dp->output_reg); in cdv_intel_dp_set_link_train()
1383 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dplink_set_level() local
1387 intel_dp->train_set, in cdv_intel_dplink_set_level()
1388 intel_dp->lane_count); in cdv_intel_dplink_set_level()
1390 if (ret != intel_dp->lane_count) { in cdv_intel_dplink_set_level()
1392 intel_dp->train_set[0], intel_dp->lane_count); in cdv_intel_dplink_set_level()
1402 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_set_vswing_premph() local
1406 if (intel_dp->output_reg == DP_B) in cdv_intel_dp_set_vswing_premph()
1468 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_start_link_train() local
1474 uint32_t DP = intel_dp->DP; in cdv_intel_dp_start_link_train()
1482 REG_WRITE(intel_dp->output_reg, reg); in cdv_intel_dp_start_link_train()
1483 REG_READ(intel_dp->output_reg); in cdv_intel_dp_start_link_train()
1489 intel_dp->link_configuration, in cdv_intel_dp_start_link_train()
1492 memset(intel_dp->train_set, 0, 4); in cdv_intel_dp_start_link_train()
1503 intel_dp->train_set[0], in cdv_intel_dp_start_link_train()
1504 intel_dp->link_configuration[0], in cdv_intel_dp_start_link_train()
1505 intel_dp->link_configuration[1]); in cdv_intel_dp_start_link_train()
1510 cdv_intel_dp_set_vswing_premph(encoder, intel_dp->train_set[0]); in cdv_intel_dp_start_link_train()
1520 intel_dp->link_status[0], intel_dp->link_status[1], intel_dp->link_status[2], in cdv_intel_dp_start_link_train()
1521 intel_dp->link_status[3], intel_dp->link_status[4], intel_dp->link_status[5]); in cdv_intel_dp_start_link_train()
1523 if (cdv_intel_clock_recovery_ok(intel_dp->link_status, intel_dp->lane_count)) { in cdv_intel_dp_start_link_train()
1530 for (i = 0; i < intel_dp->lane_count; i++) in cdv_intel_dp_start_link_train()
1531 if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) in cdv_intel_dp_start_link_train()
1533 if (i == intel_dp->lane_count) in cdv_intel_dp_start_link_train()
1537 if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) { in cdv_intel_dp_start_link_train()
1543 voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; in cdv_intel_dp_start_link_train()
1551 DRM_DEBUG_KMS("failure in DP patter 1 training, train set %x\n", intel_dp->train_set[0]); in cdv_intel_dp_start_link_train()
1554 intel_dp->DP = DP; in cdv_intel_dp_start_link_train()
1561 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_complete_link_train() local
1564 uint32_t DP = intel_dp->DP; in cdv_intel_dp_complete_link_train()
1576 intel_dp->train_set[0], in cdv_intel_dp_complete_link_train()
1577 intel_dp->link_configuration[0], in cdv_intel_dp_complete_link_train()
1578 intel_dp->link_configuration[1]); in cdv_intel_dp_complete_link_train()
1593 cdv_intel_dp_set_vswing_premph(encoder, intel_dp->train_set[0]); in cdv_intel_dp_complete_link_train()
1602 intel_dp->link_status[0], intel_dp->link_status[1], intel_dp->link_status[2], in cdv_intel_dp_complete_link_train()
1603 intel_dp->link_status[3], intel_dp->link_status[4], intel_dp->link_status[5]); in cdv_intel_dp_complete_link_train()
1606 if (!cdv_intel_clock_recovery_ok(intel_dp->link_status, intel_dp->lane_count)) { in cdv_intel_dp_complete_link_train()
1634 REG_WRITE(intel_dp->output_reg, reg); in cdv_intel_dp_complete_link_train()
1635 REG_READ(intel_dp->output_reg); in cdv_intel_dp_complete_link_train()
1644 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_link_down() local
1645 uint32_t DP = intel_dp->DP; in cdv_intel_dp_link_down()
1647 if ((REG_READ(intel_dp->output_reg) & DP_PORT_EN) == 0) in cdv_intel_dp_link_down()
1655 REG_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE); in cdv_intel_dp_link_down()
1657 REG_READ(intel_dp->output_reg); in cdv_intel_dp_link_down()
1661 REG_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); in cdv_intel_dp_link_down()
1662 REG_READ(intel_dp->output_reg); in cdv_intel_dp_link_down()
1667 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_dp_detect() local
1671 if (cdv_intel_dp_aux_native_read(encoder, 0x000, intel_dp->dpcd, in cdv_dp_detect()
1672 sizeof (intel_dp->dpcd)) == sizeof (intel_dp->dpcd)) in cdv_dp_detect()
1674 if (intel_dp->dpcd[DP_DPCD_REV] != 0) in cdv_dp_detect()
1679 intel_dp->dpcd[0], intel_dp->dpcd[1], in cdv_dp_detect()
1680 intel_dp->dpcd[2], intel_dp->dpcd[3]); in cdv_dp_detect()
1694 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_detect() local
1699 intel_dp->has_audio = false; in cdv_intel_dp_detect()
1710 if (intel_dp->force_audio) { in cdv_intel_dp_detect()
1711 intel_dp->has_audio = intel_dp->force_audio > 0; in cdv_intel_dp_detect()
1713 edid = drm_get_edid(connector, &intel_dp->adapter); in cdv_intel_dp_detect()
1715 intel_dp->has_audio = drm_detect_monitor_audio(edid); in cdv_intel_dp_detect()
1728 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_dp_get_modes() local
1734 edid = drm_get_edid(connector, &intel_dp->adapter); in cdv_intel_dp_get_modes()
1747 if (edp && !intel_dp->panel_fixed_mode) { in cdv_intel_dp_get_modes()
1752 intel_dp->panel_fixed_mode = in cdv_intel_dp_get_modes()
1761 if (!intel_dp->panel_fixed_mode && dev_priv->lfp_lvds_vbt_mode) { in cdv_intel_dp_get_modes()
1762 intel_dp->panel_fixed_mode = in cdv_intel_dp_get_modes()
1764 if (intel_dp->panel_fixed_mode) { in cdv_intel_dp_get_modes()
1765 intel_dp->panel_fixed_mode->type |= in cdv_intel_dp_get_modes()
1769 if (intel_dp->panel_fixed_mode != NULL) { in cdv_intel_dp_get_modes()
1771 mode = drm_mode_duplicate(dev, intel_dp->panel_fixed_mode); in cdv_intel_dp_get_modes()
1784 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_detect_audio() local
1792 edid = drm_get_edid(connector, &intel_dp->adapter); in cdv_intel_dp_detect_audio()
1810 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_set_property() local
1821 if (i == intel_dp->force_audio) in cdv_intel_dp_set_property()
1824 intel_dp->force_audio = i; in cdv_intel_dp_set_property()
1831 if (has_audio == intel_dp->has_audio) in cdv_intel_dp_set_property()
1834 intel_dp->has_audio = has_audio; in cdv_intel_dp_set_property()
1839 if (val == !!intel_dp->color_range) in cdv_intel_dp_set_property()
1842 intel_dp->color_range = val ? DP_COLOR_RANGE_16_235 : 0; in cdv_intel_dp_set_property()
1864 struct cdv_intel_dp *intel_dp = gma_encoder->dev_priv; in cdv_intel_dp_destroy() local
1868 kfree(intel_dp->panel_fixed_mode); in cdv_intel_dp_destroy()
1869 intel_dp->panel_fixed_mode = NULL; in cdv_intel_dp_destroy()
1871 i2c_del_adapter(&intel_dp->adapter); in cdv_intel_dp_destroy()
1953 struct cdv_intel_dp *intel_dp; in cdv_intel_dp_init() local
1963 intel_dp = kzalloc(sizeof(struct cdv_intel_dp), GFP_KERNEL); in cdv_intel_dp_init()
1964 if (!intel_dp) in cdv_intel_dp_init()
1984 gma_encoder->dev_priv=intel_dp; in cdv_intel_dp_init()
1985 intel_dp->encoder = gma_encoder; in cdv_intel_dp_init()
1986 intel_dp->output_reg = output_reg; in cdv_intel_dp_init()
2053 intel_dp->panel_power_up_delay = cur.t1_t3 / 10; in cdv_intel_dp_init()
2054 intel_dp->backlight_on_delay = cur.t8 / 10; in cdv_intel_dp_init()
2055 intel_dp->backlight_off_delay = cur.t9 / 10; in cdv_intel_dp_init()
2056 intel_dp->panel_power_down_delay = cur.t10 / 10; in cdv_intel_dp_init()
2057 intel_dp->panel_power_cycle_delay = (cur.t11_t12 - 1) * 100; in cdv_intel_dp_init()
2060 intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, in cdv_intel_dp_init()
2061 intel_dp->panel_power_cycle_delay); in cdv_intel_dp_init()
2064 intel_dp->backlight_on_delay, intel_dp->backlight_off_delay); in cdv_intel_dp_init()
2069 intel_dp->dpcd, in cdv_intel_dp_init()
2070 sizeof(intel_dp->dpcd)); in cdv_intel_dp_init()
2080 intel_dp->dpcd[0], intel_dp->dpcd[1], in cdv_intel_dp_init()
2081 intel_dp->dpcd[2], intel_dp->dpcd[3]); in cdv_intel_dp_init()