Lines Matching refs:dspcntr

158 	u32 dspcntr;  in i9xx_plane_ctl()  local
160 dspcntr = DISP_ENABLE; in i9xx_plane_ctl()
164 dspcntr |= DISP_TRICKLE_FEED_DISABLE; in i9xx_plane_ctl()
168 dspcntr |= DISP_FORMAT_8BPP; in i9xx_plane_ctl()
171 dspcntr |= DISP_FORMAT_BGRX555; in i9xx_plane_ctl()
174 dspcntr |= DISP_FORMAT_BGRA555; in i9xx_plane_ctl()
177 dspcntr |= DISP_FORMAT_BGRX565; in i9xx_plane_ctl()
180 dspcntr |= DISP_FORMAT_BGRX888; in i9xx_plane_ctl()
183 dspcntr |= DISP_FORMAT_RGBX888; in i9xx_plane_ctl()
186 dspcntr |= DISP_FORMAT_BGRA888; in i9xx_plane_ctl()
189 dspcntr |= DISP_FORMAT_RGBA888; in i9xx_plane_ctl()
192 dspcntr |= DISP_FORMAT_BGRX101010; in i9xx_plane_ctl()
195 dspcntr |= DISP_FORMAT_RGBX101010; in i9xx_plane_ctl()
198 dspcntr |= DISP_FORMAT_BGRA101010; in i9xx_plane_ctl()
201 dspcntr |= DISP_FORMAT_RGBA101010; in i9xx_plane_ctl()
204 dspcntr |= DISP_FORMAT_RGBX161616; in i9xx_plane_ctl()
213 dspcntr |= DISP_TILED; in i9xx_plane_ctl()
216 dspcntr |= DISP_ROTATE_180; in i9xx_plane_ctl()
219 dspcntr |= DISP_MIRROR; in i9xx_plane_ctl()
221 return dspcntr; in i9xx_plane_ctl()
356 u32 dspcntr = 0; in i9xx_plane_ctl_crtc() local
359 dspcntr |= DISP_PIPE_GAMMA_ENABLE; in i9xx_plane_ctl_crtc()
362 dspcntr |= DISP_PIPE_CSC_ENABLE; in i9xx_plane_ctl_crtc()
365 dspcntr |= DISP_PIPE_SEL(crtc->pipe); in i9xx_plane_ctl_crtc()
367 return dspcntr; in i9xx_plane_ctl_crtc()
453 u32 dspcntr, dspaddr_offset, linear_offset; in i9xx_plane_update_arm() local
455 dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state); in i9xx_plane_update_arm()
492 intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr); in i9xx_plane_update_arm()
521 u32 dspcntr; in i9xx_plane_disable_arm() local
533 dspcntr = i9xx_plane_ctl_crtc(crtc_state); in i9xx_plane_disable_arm()
535 intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr); in i9xx_plane_disable_arm()
550 u32 dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state); in g4x_primary_async_flip() local
555 dspcntr |= DISP_ASYNC_FLIP; in g4x_primary_async_flip()
557 intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr); in g4x_primary_async_flip()