Lines Matching refs:crtc_state
127 static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
128 static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state);
129 static void hsw_set_transconf(const struct intel_crtc_state *crtc_state);
130 static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
131 static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state);
285 static bool is_hdr_mode(const struct intel_crtc_state *crtc_state) in is_hdr_mode() argument
287 return (crtc_state->active_planes & in is_hdr_mode()
326 is_trans_port_sync_slave(const struct intel_crtc_state *crtc_state) in is_trans_port_sync_slave() argument
328 return crtc_state->master_transcoder != INVALID_TRANSCODER; in is_trans_port_sync_slave()
332 is_trans_port_sync_master(const struct intel_crtc_state *crtc_state) in is_trans_port_sync_master() argument
334 return crtc_state->sync_mode_slaves_mask != 0; in is_trans_port_sync_master()
338 is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state) in is_trans_port_sync_mode() argument
340 return is_trans_port_sync_master(crtc_state) || in is_trans_port_sync_mode()
341 is_trans_port_sync_slave(crtc_state); in is_trans_port_sync_mode()
344 static enum pipe bigjoiner_master_pipe(const struct intel_crtc_state *crtc_state) in bigjoiner_master_pipe() argument
346 return ffs(crtc_state->bigjoiner_pipes) - 1; in bigjoiner_master_pipe()
349 u8 intel_crtc_bigjoiner_slave_pipes(const struct intel_crtc_state *crtc_state) in intel_crtc_bigjoiner_slave_pipes() argument
351 if (crtc_state->bigjoiner_pipes) in intel_crtc_bigjoiner_slave_pipes()
352 return crtc_state->bigjoiner_pipes & ~BIT(bigjoiner_master_pipe(crtc_state)); in intel_crtc_bigjoiner_slave_pipes()
357 bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state) in intel_crtc_is_bigjoiner_slave() argument
359 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_is_bigjoiner_slave()
361 return crtc_state->bigjoiner_pipes && in intel_crtc_is_bigjoiner_slave()
362 crtc->pipe != bigjoiner_master_pipe(crtc_state); in intel_crtc_is_bigjoiner_slave()
365 bool intel_crtc_is_bigjoiner_master(const struct intel_crtc_state *crtc_state) in intel_crtc_is_bigjoiner_master() argument
367 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_is_bigjoiner_master()
369 return crtc_state->bigjoiner_pipes && in intel_crtc_is_bigjoiner_master()
370 crtc->pipe == bigjoiner_master_pipe(crtc_state); in intel_crtc_is_bigjoiner_master()
373 static int intel_bigjoiner_num_pipes(const struct intel_crtc_state *crtc_state) in intel_bigjoiner_num_pipes() argument
375 return hweight8(crtc_state->bigjoiner_pipes); in intel_bigjoiner_num_pipes()
378 struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state) in intel_master_crtc() argument
380 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); in intel_master_crtc()
382 if (intel_crtc_is_bigjoiner_slave(crtc_state)) in intel_master_crtc()
383 return intel_crtc_for_pipe(i915, bigjoiner_master_pipe(crtc_state)); in intel_master_crtc()
385 return to_intel_crtc(crtc_state->uapi.crtc); in intel_master_crtc()
701 void intel_set_plane_visible(struct intel_crtc_state *crtc_state, in intel_set_plane_visible() argument
710 crtc_state->uapi.plane_mask |= drm_plane_mask(&plane->base); in intel_set_plane_visible()
712 crtc_state->uapi.plane_mask &= ~drm_plane_mask(&plane->base); in intel_set_plane_visible()
715 void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state) in intel_plane_fixup_bitmasks() argument
717 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in intel_plane_fixup_bitmasks()
725 crtc_state->enabled_planes = 0; in intel_plane_fixup_bitmasks()
726 crtc_state->active_planes = 0; in intel_plane_fixup_bitmasks()
729 crtc_state->uapi.plane_mask) { in intel_plane_fixup_bitmasks()
730 crtc_state->enabled_planes |= BIT(to_intel_plane(plane)->id); in intel_plane_fixup_bitmasks()
731 crtc_state->active_planes |= BIT(to_intel_plane(plane)->id); in intel_plane_fixup_bitmasks()
739 struct intel_crtc_state *crtc_state = in intel_plane_disable_noatomic() local
749 intel_set_plane_visible(crtc_state, plane_state, false); in intel_plane_disable_noatomic()
750 intel_plane_fixup_bitmasks(crtc_state); in intel_plane_disable_noatomic()
751 crtc_state->data_rate[plane->id] = 0; in intel_plane_disable_noatomic()
752 crtc_state->data_rate_y[plane->id] = 0; in intel_plane_disable_noatomic()
753 crtc_state->rel_data_rate[plane->id] = 0; in intel_plane_disable_noatomic()
754 crtc_state->rel_data_rate_y[plane->id] = 0; in intel_plane_disable_noatomic()
755 crtc_state->min_cdclk[plane->id] = 0; in intel_plane_disable_noatomic()
757 if ((crtc_state->active_planes & ~BIT(PLANE_CURSOR)) == 0 && in intel_plane_disable_noatomic()
758 hsw_ips_disable(crtc_state)) { in intel_plane_disable_noatomic()
759 crtc_state->ips_enabled = false; in intel_plane_disable_noatomic()
780 if (DISPLAY_VER(dev_priv) == 2 && !crtc_state->active_planes) in intel_plane_disable_noatomic()
783 intel_plane_disable_arm(plane, crtc_state); in intel_plane_disable_noatomic()
817 struct drm_crtc_state *crtc_state; in __intel_display_resume() local
832 for_each_new_crtc_in_state(state, crtc, crtc_state, i) { in __intel_display_resume()
838 crtc_state->mode_changed = true; in __intel_display_resume()
967 static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state) in icl_set_pipe_chicken() argument
969 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in icl_set_pipe_chicken()
1037 const struct intel_crtc_state *crtc_state) in intel_get_crtc_new_encoder() argument
1046 master_crtc = intel_master_crtc(crtc_state); in intel_get_crtc_new_encoder()
1063 static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state) in ilk_pfit_enable() argument
1065 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_pfit_enable()
1067 const struct drm_rect *dst = &crtc_state->pch_pfit.dst; in ilk_pfit_enable()
1074 if (!crtc_state->pch_pfit.enabled) in ilk_pfit_enable()
1101 static bool needs_nv12_wa(const struct intel_crtc_state *crtc_state) in needs_nv12_wa() argument
1103 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in needs_nv12_wa()
1105 if (!crtc_state->nv12_planes) in needs_nv12_wa()
1115 static bool needs_scalerclk_wa(const struct intel_crtc_state *crtc_state) in needs_scalerclk_wa() argument
1117 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in needs_scalerclk_wa()
1120 if (crtc_state->scaler_state.scaler_users > 0 && DISPLAY_VER(dev_priv) == 11) in needs_scalerclk_wa()
1126 static bool needs_cursorclk_wa(const struct intel_crtc_state *crtc_state) in needs_cursorclk_wa() argument
1128 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in needs_cursorclk_wa()
1131 if (is_hdr_mode(crtc_state) && in needs_cursorclk_wa()
1132 crtc_state->active_planes & BIT(PLANE_CURSOR) && in needs_cursorclk_wa()
1158 static bool needs_async_flip_vtd_wa(const struct intel_crtc_state *crtc_state) in needs_async_flip_vtd_wa() argument
1160 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); in needs_async_flip_vtd_wa()
1162 return crtc_state->uapi.async_flip && i915_vtd_active(i915) && in needs_async_flip_vtd_wa()
1217 const struct intel_crtc_state *crtc_state = in intel_crtc_enable_flip_done() local
1219 u8 update_planes = crtc_state->update_planes; in intel_crtc_enable_flip_done()
1234 const struct intel_crtc_state *crtc_state = in intel_crtc_disable_flip_done() local
1236 u8 update_planes = crtc_state->update_planes; in intel_crtc_disable_flip_done()
1514 const struct intel_crtc_state *crtc_state = in intel_encoders_pre_pll_enable() local
1529 crtc_state, conn_state); in intel_encoders_pre_pll_enable()
1536 const struct intel_crtc_state *crtc_state = in intel_encoders_pre_enable() local
1551 crtc_state, conn_state); in intel_encoders_pre_enable()
1558 const struct intel_crtc_state *crtc_state = in intel_encoders_enable() local
1573 crtc_state, conn_state); in intel_encoders_enable()
1648 const struct intel_crtc_state *crtc_state = in intel_encoders_update_pipe() local
1663 crtc_state, conn_state); in intel_encoders_update_pipe()
1667 static void intel_disable_primary_plane(const struct intel_crtc_state *crtc_state) in intel_disable_primary_plane() argument
1669 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_disable_primary_plane()
1672 plane->disable_arm(plane, crtc_state); in intel_disable_primary_plane()
1675 static void ilk_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state) in ilk_configure_cpu_transcoder() argument
1677 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_configure_cpu_transcoder()
1678 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in ilk_configure_cpu_transcoder()
1680 if (crtc_state->has_pch_encoder) { in ilk_configure_cpu_transcoder()
1682 &crtc_state->fdi_m_n); in ilk_configure_cpu_transcoder()
1683 } else if (intel_crtc_has_dp_encoder(crtc_state)) { in ilk_configure_cpu_transcoder()
1685 &crtc_state->dp_m_n); in ilk_configure_cpu_transcoder()
1687 &crtc_state->dp_m2_n2); in ilk_configure_cpu_transcoder()
1690 intel_set_transcoder_timings(crtc_state); in ilk_configure_cpu_transcoder()
1692 ilk_set_pipeconf(crtc_state); in ilk_configure_cpu_transcoder()
1787 static void hsw_set_linetime_wm(const struct intel_crtc_state *crtc_state) in hsw_set_linetime_wm() argument
1789 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_set_linetime_wm()
1793 HSW_LINETIME(crtc_state->linetime) | in hsw_set_linetime_wm()
1794 HSW_IPS_LINETIME(crtc_state->ips_linetime)); in hsw_set_linetime_wm()
1797 static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state) in hsw_set_frame_start_delay() argument
1799 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_set_frame_start_delay()
1801 enum transcoder transcoder = crtc_state->cpu_transcoder; in hsw_set_frame_start_delay()
1808 val |= HSW_FRAME_START_DELAY(crtc_state->framestart_delay - 1); in hsw_set_frame_start_delay()
1813 const struct intel_crtc_state *crtc_state) in icl_ddi_bigjoiner_pre_enable() argument
1815 struct intel_crtc *master_crtc = intel_master_crtc(crtc_state); in icl_ddi_bigjoiner_pre_enable()
1820 if (intel_crtc_is_bigjoiner_slave(crtc_state)) in icl_ddi_bigjoiner_pre_enable()
1823 if (crtc_state->shared_dpll) in icl_ddi_bigjoiner_pre_enable()
1824 intel_enable_shared_dpll(crtc_state); in icl_ddi_bigjoiner_pre_enable()
1826 if (intel_crtc_is_bigjoiner_slave(crtc_state)) in icl_ddi_bigjoiner_pre_enable()
1830 static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state) in hsw_configure_cpu_transcoder() argument
1832 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_configure_cpu_transcoder()
1834 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in hsw_configure_cpu_transcoder()
1836 if (crtc_state->has_pch_encoder) { in hsw_configure_cpu_transcoder()
1838 &crtc_state->fdi_m_n); in hsw_configure_cpu_transcoder()
1839 } else if (intel_crtc_has_dp_encoder(crtc_state)) { in hsw_configure_cpu_transcoder()
1841 &crtc_state->dp_m_n); in hsw_configure_cpu_transcoder()
1843 &crtc_state->dp_m2_n2); in hsw_configure_cpu_transcoder()
1846 intel_set_transcoder_timings(crtc_state); in hsw_configure_cpu_transcoder()
1850 crtc_state->pixel_multiplier - 1); in hsw_configure_cpu_transcoder()
1852 hsw_set_frame_start_delay(crtc_state); in hsw_configure_cpu_transcoder()
1854 hsw_set_transconf(crtc_state); in hsw_configure_cpu_transcoder()
2021 static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state) in i9xx_pfit_enable() argument
2023 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in i9xx_pfit_enable()
2026 if (!crtc_state->gmch_pfit.control) in i9xx_pfit_enable()
2035 assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder); in i9xx_pfit_enable()
2038 crtc_state->gmch_pfit.pgm_ratios); in i9xx_pfit_enable()
2039 intel_de_write(dev_priv, PFIT_CONTROL, crtc_state->gmch_pfit.control); in i9xx_pfit_enable()
2134 static void get_crtc_power_domains(struct intel_crtc_state *crtc_state, in get_crtc_power_domains() argument
2137 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in get_crtc_power_domains()
2139 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in get_crtc_power_domains()
2145 if (!crtc_state->hw.active) in get_crtc_power_domains()
2150 if (crtc_state->pch_pfit.enabled || in get_crtc_power_domains()
2151 crtc_state->pch_pfit.force_thru) in get_crtc_power_domains()
2155 crtc_state->uapi.encoder_mask) { in get_crtc_power_domains()
2161 if (HAS_DDI(dev_priv) && crtc_state->has_audio) in get_crtc_power_domains()
2164 if (crtc_state->shared_dpll) in get_crtc_power_domains()
2167 if (crtc_state->dsc.compression_enable) in get_crtc_power_domains()
2171 void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state, in intel_modeset_get_crtc_power_domains() argument
2174 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_modeset_get_crtc_power_domains()
2179 get_crtc_power_domains(crtc_state, &domains); in intel_modeset_get_crtc_power_domains()
2204 static void i9xx_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state) in i9xx_configure_cpu_transcoder() argument
2206 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in i9xx_configure_cpu_transcoder()
2207 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in i9xx_configure_cpu_transcoder()
2209 if (intel_crtc_has_dp_encoder(crtc_state)) { in i9xx_configure_cpu_transcoder()
2211 &crtc_state->dp_m_n); in i9xx_configure_cpu_transcoder()
2213 &crtc_state->dp_m2_n2); in i9xx_configure_cpu_transcoder()
2216 intel_set_transcoder_timings(crtc_state); in i9xx_configure_cpu_transcoder()
2218 i9xx_set_pipeconf(crtc_state); in i9xx_configure_cpu_transcoder()
2418 static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state) in ilk_pipe_pixel_rate() argument
2420 u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock; in ilk_pipe_pixel_rate()
2428 if (!crtc_state->pch_pfit.enabled) in ilk_pipe_pixel_rate()
2432 drm_rect_width(&crtc_state->pipe_src) << 16, in ilk_pipe_pixel_rate()
2433 drm_rect_height(&crtc_state->pipe_src) << 16); in ilk_pipe_pixel_rate()
2435 return intel_adjusted_rate(&src, &crtc_state->pch_pfit.dst, in ilk_pipe_pixel_rate()
2460 static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state) in intel_crtc_compute_pixel_rate() argument
2462 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in intel_crtc_compute_pixel_rate()
2466 crtc_state->pixel_rate = in intel_crtc_compute_pixel_rate()
2467 crtc_state->hw.pipe_mode.crtc_clock; in intel_crtc_compute_pixel_rate()
2469 crtc_state->pixel_rate = in intel_crtc_compute_pixel_rate()
2470 ilk_pipe_pixel_rate(crtc_state); in intel_crtc_compute_pixel_rate()
2473 static void intel_bigjoiner_adjust_timings(const struct intel_crtc_state *crtc_state, in intel_bigjoiner_adjust_timings() argument
2476 int num_pipes = intel_bigjoiner_num_pipes(crtc_state); in intel_bigjoiner_adjust_timings()
2490 static void intel_splitter_adjust_timings(const struct intel_crtc_state *crtc_state, in intel_splitter_adjust_timings() argument
2493 int overlap = crtc_state->splitter.pixel_overlap; in intel_splitter_adjust_timings()
2494 int n = crtc_state->splitter.link_count; in intel_splitter_adjust_timings()
2496 if (!crtc_state->splitter.enable) in intel_splitter_adjust_timings()
2514 static void intel_crtc_readout_derived_state(struct intel_crtc_state *crtc_state) in intel_crtc_readout_derived_state() argument
2516 struct drm_display_mode *mode = &crtc_state->hw.mode; in intel_crtc_readout_derived_state()
2517 struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_readout_derived_state()
2518 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_crtc_readout_derived_state()
2527 intel_splitter_adjust_timings(crtc_state, pipe_mode); in intel_crtc_readout_derived_state()
2539 mode->hdisplay = drm_rect_width(&crtc_state->pipe_src) * in intel_crtc_readout_derived_state()
2540 (intel_bigjoiner_num_pipes(crtc_state) ?: 1); in intel_crtc_readout_derived_state()
2541 mode->vdisplay = drm_rect_height(&crtc_state->pipe_src); in intel_crtc_readout_derived_state()
2544 intel_bigjoiner_adjust_timings(crtc_state, pipe_mode); in intel_crtc_readout_derived_state()
2547 intel_crtc_compute_pixel_rate(crtc_state); in intel_crtc_readout_derived_state()
2551 struct intel_crtc_state *crtc_state) in intel_encoder_get_config() argument
2553 encoder->get_config(encoder, crtc_state); in intel_encoder_get_config()
2555 intel_crtc_readout_derived_state(crtc_state); in intel_encoder_get_config()
2558 static void intel_bigjoiner_compute_pipe_src(struct intel_crtc_state *crtc_state) in intel_bigjoiner_compute_pipe_src() argument
2560 int num_pipes = intel_bigjoiner_num_pipes(crtc_state); in intel_bigjoiner_compute_pipe_src()
2566 width = drm_rect_width(&crtc_state->pipe_src); in intel_bigjoiner_compute_pipe_src()
2567 height = drm_rect_height(&crtc_state->pipe_src); in intel_bigjoiner_compute_pipe_src()
2569 drm_rect_init(&crtc_state->pipe_src, 0, 0, in intel_bigjoiner_compute_pipe_src()
2573 static int intel_crtc_compute_pipe_src(struct intel_crtc_state *crtc_state) in intel_crtc_compute_pipe_src() argument
2575 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_compute_pipe_src()
2578 intel_bigjoiner_compute_pipe_src(crtc_state); in intel_crtc_compute_pipe_src()
2586 if (drm_rect_width(&crtc_state->pipe_src) & 1) { in intel_crtc_compute_pipe_src()
2587 if (crtc_state->double_wide) { in intel_crtc_compute_pipe_src()
2594 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) && in intel_crtc_compute_pipe_src()
2606 static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state) in intel_crtc_compute_pipe_mode() argument
2608 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_compute_pipe_mode()
2610 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_crtc_compute_pipe_mode()
2611 struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_compute_pipe_mode()
2621 intel_splitter_adjust_timings(crtc_state, pipe_mode); in intel_crtc_compute_pipe_mode()
2624 intel_bigjoiner_adjust_timings(crtc_state, pipe_mode); in intel_crtc_compute_pipe_mode()
2637 crtc_state->double_wide = true; in intel_crtc_compute_pipe_mode()
2646 str_yes_no(crtc_state->double_wide)); in intel_crtc_compute_pipe_mode()
2656 struct intel_crtc_state *crtc_state = in intel_crtc_compute_config() local
2664 ret = intel_crtc_compute_pipe_src(crtc_state); in intel_crtc_compute_config()
2668 ret = intel_crtc_compute_pipe_mode(crtc_state); in intel_crtc_compute_config()
2672 intel_crtc_compute_pixel_rate(crtc_state); in intel_crtc_compute_config()
2674 if (crtc_state->has_pch_encoder) in intel_crtc_compute_config()
2675 return ilk_fdi_compute_config(crtc, crtc_state); in intel_crtc_compute_config()
2815 static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state) in intel_set_transcoder_timings() argument
2817 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_set_transcoder_timings()
2820 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_set_transcoder_timings()
2821 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_set_transcoder_timings()
2835 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) in intel_set_transcoder_timings()
2873 static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state) in intel_set_pipe_src_size() argument
2875 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_set_pipe_src_size()
2877 int width = drm_rect_width(&crtc_state->pipe_src); in intel_set_pipe_src_size()
2878 int height = drm_rect_height(&crtc_state->pipe_src); in intel_set_pipe_src_size()
2888 static bool intel_pipe_is_interlaced(const struct intel_crtc_state *crtc_state) in intel_pipe_is_interlaced() argument
2890 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in intel_pipe_is_interlaced()
2891 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_pipe_is_interlaced()
2948 static void intel_bigjoiner_adjust_pipe_src(struct intel_crtc_state *crtc_state) in intel_bigjoiner_adjust_pipe_src() argument
2950 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_bigjoiner_adjust_pipe_src()
2951 int num_pipes = intel_bigjoiner_num_pipes(crtc_state); in intel_bigjoiner_adjust_pipe_src()
2958 master_pipe = bigjoiner_master_pipe(crtc_state); in intel_bigjoiner_adjust_pipe_src()
2959 width = drm_rect_width(&crtc_state->pipe_src); in intel_bigjoiner_adjust_pipe_src()
2961 drm_rect_translate_to(&crtc_state->pipe_src, in intel_bigjoiner_adjust_pipe_src()
2981 void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state) in i9xx_set_pipeconf() argument
2983 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in i9xx_set_pipeconf()
2992 if (IS_I830(dev_priv) || !intel_crtc_needs_modeset(crtc_state)) in i9xx_set_pipeconf()
2995 if (crtc_state->double_wide) in i9xx_set_pipeconf()
3002 if (crtc_state->dither && crtc_state->pipe_bpp != 30) in i9xx_set_pipeconf()
3006 switch (crtc_state->pipe_bpp) { in i9xx_set_pipeconf()
3009 MISSING_CASE(crtc_state->pipe_bpp); in i9xx_set_pipeconf()
3023 if (crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) { in i9xx_set_pipeconf()
3025 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) in i9xx_set_pipeconf()
3034 crtc_state->limited_color_range) in i9xx_set_pipeconf()
3037 pipeconf |= PIPECONF_GAMMA_MODE(crtc_state->gamma_mode); in i9xx_set_pipeconf()
3039 pipeconf |= PIPECONF_FRAME_START_DELAY(crtc_state->framestart_delay - 1); in i9xx_set_pipeconf()
3054 static void i9xx_get_pfit_config(struct intel_crtc_state *crtc_state) in i9xx_get_pfit_config() argument
3056 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in i9xx_get_pfit_config()
3076 crtc_state->gmch_pfit.control = tmp; in i9xx_get_pfit_config()
3077 crtc_state->gmch_pfit.pgm_ratios = in i9xx_get_pfit_config()
3163 static void i9xx_get_pipe_color_config(struct intel_crtc_state *crtc_state) in i9xx_get_pipe_color_config() argument
3165 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in i9xx_get_pipe_color_config()
3174 crtc_state->gamma_enable = true; in i9xx_get_pipe_color_config()
3178 crtc_state->csc_enable = true; in i9xx_get_pipe_color_config()
3305 void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state) in ilk_set_pipeconf() argument
3307 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_set_pipeconf()
3316 if (!intel_crtc_needs_modeset(crtc_state)) in ilk_set_pipeconf()
3319 switch (crtc_state->pipe_bpp) { in ilk_set_pipeconf()
3322 MISSING_CASE(crtc_state->pipe_bpp); in ilk_set_pipeconf()
3338 if (crtc_state->dither) in ilk_set_pipeconf()
3341 if (crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) in ilk_set_pipeconf()
3350 drm_WARN_ON(&dev_priv->drm, crtc_state->limited_color_range && in ilk_set_pipeconf()
3351 crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB); in ilk_set_pipeconf()
3353 if (crtc_state->limited_color_range && in ilk_set_pipeconf()
3354 !intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) in ilk_set_pipeconf()
3357 if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB) in ilk_set_pipeconf()
3360 val |= PIPECONF_GAMMA_MODE(crtc_state->gamma_mode); in ilk_set_pipeconf()
3362 val |= PIPECONF_FRAME_START_DELAY(crtc_state->framestart_delay - 1); in ilk_set_pipeconf()
3363 val |= PIPECONF_MSA_TIMING_DELAY(crtc_state->msa_timing_delay); in ilk_set_pipeconf()
3369 static void hsw_set_transconf(const struct intel_crtc_state *crtc_state) in hsw_set_transconf() argument
3371 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_set_transconf()
3373 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in hsw_set_transconf()
3380 if (!intel_crtc_needs_modeset(crtc_state)) in hsw_set_transconf()
3383 if (IS_HASWELL(dev_priv) && crtc_state->dither) in hsw_set_transconf()
3386 if (crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) in hsw_set_transconf()
3392 crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB) in hsw_set_transconf()
3399 static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state) in bdw_set_pipemisc() argument
3401 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in bdw_set_pipemisc()
3405 switch (crtc_state->pipe_bpp) { in bdw_set_pipemisc()
3421 MISSING_CASE(crtc_state->pipe_bpp); in bdw_set_pipemisc()
3425 if (crtc_state->dither) in bdw_set_pipemisc()
3428 if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 || in bdw_set_pipemisc()
3429 crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) in bdw_set_pipemisc()
3432 if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) in bdw_set_pipemisc()
3436 if (DISPLAY_VER(dev_priv) >= 11 && is_hdr_mode(crtc_state)) in bdw_set_pipemisc()
3533 static void ilk_get_pfit_pos_size(struct intel_crtc_state *crtc_state, in ilk_get_pfit_pos_size() argument
3536 drm_rect_init(&crtc_state->pch_pfit.dst, in ilk_get_pfit_pos_size()
3541 static void skl_get_pfit_config(struct intel_crtc_state *crtc_state) in skl_get_pfit_config() argument
3543 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in skl_get_pfit_config()
3545 struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; in skl_get_pfit_config()
3558 crtc_state->pch_pfit.enabled = true; in skl_get_pfit_config()
3563 ilk_get_pfit_pos_size(crtc_state, pos, size); in skl_get_pfit_config()
3576 static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state) in ilk_get_pfit_config() argument
3578 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_get_pfit_config()
3586 crtc_state->pch_pfit.enabled = true; in ilk_get_pfit_config()
3591 ilk_get_pfit_pos_size(crtc_state, pos, size); in ilk_get_pfit_config()
3987 static void intel_bigjoiner_get_config(struct intel_crtc_state *crtc_state) in intel_bigjoiner_get_config() argument
3989 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_bigjoiner_get_config()
3999 crtc_state->bigjoiner_pipes = in intel_bigjoiner_get_config()
4115 bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state) in intel_crtc_get_pipe_config() argument
4117 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_get_pipe_config()
4120 if (!i915->display.funcs.display->get_pipe_config(crtc, crtc_state)) in intel_crtc_get_pipe_config()
4123 crtc_state->hw.active = true; in intel_crtc_get_pipe_config()
4125 intel_crtc_readout_derived_state(crtc_state); in intel_crtc_get_pipe_config()
4174 struct intel_crtc_state *crtc_state; in intel_get_load_detect_pipe() local
4257 crtc_state = intel_atomic_get_crtc_state(state, crtc); in intel_get_load_detect_pipe()
4258 if (IS_ERR(crtc_state)) { in intel_get_load_detect_pipe()
4259 ret = PTR_ERR(crtc_state); in intel_get_load_detect_pipe()
4263 crtc_state->uapi.active = true; in intel_get_load_detect_pipe()
4265 ret = drm_atomic_set_mode_for_crtc(&crtc_state->uapi, in intel_get_load_detect_pipe()
4499 struct intel_crtc_state *crtc_state; in intel_encoder_current_mode() local
4513 crtc_state = intel_crtc_state_alloc(crtc); in intel_encoder_current_mode()
4514 if (!crtc_state) { in intel_encoder_current_mode()
4519 if (!intel_crtc_get_pipe_config(crtc_state)) { in intel_encoder_current_mode()
4520 kfree(crtc_state); in intel_encoder_current_mode()
4525 intel_encoder_get_config(encoder, crtc_state); in intel_encoder_current_mode()
4527 intel_mode_from_crtc_timings(mode, &crtc_state->hw.adjusted_mode); in intel_encoder_current_mode()
4529 kfree(crtc_state); in intel_encoder_current_mode()
4589 static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state) in icl_check_nv12_planes() argument
4591 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in icl_check_nv12_planes()
4593 struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state); in icl_check_nv12_planes()
4611 crtc_state->enabled_planes &= ~BIT(plane->id); in icl_check_nv12_planes()
4612 crtc_state->active_planes &= ~BIT(plane->id); in icl_check_nv12_planes()
4613 crtc_state->update_planes |= BIT(plane->id); in icl_check_nv12_planes()
4614 crtc_state->data_rate[plane->id] = 0; in icl_check_nv12_planes()
4615 crtc_state->rel_data_rate[plane->id] = 0; in icl_check_nv12_planes()
4621 if (!crtc_state->nv12_planes) in icl_check_nv12_planes()
4628 !(crtc_state->nv12_planes & BIT(plane->id))) in icl_check_nv12_planes()
4635 if (crtc_state->active_planes & BIT(linked->id)) in icl_check_nv12_planes()
4648 hweight8(crtc_state->nv12_planes)); in icl_check_nv12_planes()
4657 crtc_state->enabled_planes |= BIT(linked->id); in icl_check_nv12_planes()
4658 crtc_state->active_planes |= BIT(linked->id); in icl_check_nv12_planes()
4659 crtc_state->update_planes |= BIT(linked->id); in icl_check_nv12_planes()
4660 crtc_state->data_rate[linked->id] = in icl_check_nv12_planes()
4661 crtc_state->data_rate_y[plane->id]; in icl_check_nv12_planes()
4662 crtc_state->rel_data_rate[linked->id] = in icl_check_nv12_planes()
4663 crtc_state->rel_data_rate_y[plane->id]; in icl_check_nv12_planes()
4705 static u16 hsw_linetime_wm(const struct intel_crtc_state *crtc_state) in hsw_linetime_wm() argument
4708 &crtc_state->hw.pipe_mode; in hsw_linetime_wm()
4711 if (!crtc_state->hw.enable) in hsw_linetime_wm()
4720 static u16 hsw_ips_linetime_wm(const struct intel_crtc_state *crtc_state, in hsw_ips_linetime_wm() argument
4724 &crtc_state->hw.pipe_mode; in hsw_ips_linetime_wm()
4727 if (!crtc_state->hw.enable) in hsw_ips_linetime_wm()
4736 static u16 skl_linetime_wm(const struct intel_crtc_state *crtc_state) in skl_linetime_wm() argument
4738 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in skl_linetime_wm()
4741 &crtc_state->hw.pipe_mode; in skl_linetime_wm()
4744 if (!crtc_state->hw.enable) in skl_linetime_wm()
4748 crtc_state->pixel_rate); in skl_linetime_wm()
4762 struct intel_crtc_state *crtc_state = in hsw_compute_linetime_wm() local
4767 crtc_state->linetime = skl_linetime_wm(crtc_state); in hsw_compute_linetime_wm()
4769 crtc_state->linetime = hsw_linetime_wm(crtc_state); in hsw_compute_linetime_wm()
4778 crtc_state->ips_linetime = hsw_ips_linetime_wm(crtc_state, in hsw_compute_linetime_wm()
4788 struct intel_crtc_state *crtc_state = in intel_crtc_atomic_check() local
4793 intel_crtc_needs_modeset(crtc_state) && in intel_crtc_atomic_check()
4794 !crtc_state->hw.active) in intel_crtc_atomic_check()
4795 crtc_state->update_wm_post = true; in intel_crtc_atomic_check()
4797 if (intel_crtc_needs_modeset(crtc_state)) { in intel_crtc_atomic_check()
4807 if (c8_planes_changed(crtc_state)) in intel_crtc_atomic_check()
4808 crtc_state->uapi.color_mgmt_changed = true; in intel_crtc_atomic_check()
4810 if (intel_crtc_needs_color_update(crtc_state)) { in intel_crtc_atomic_check()
4811 ret = intel_color_check(crtc_state); in intel_crtc_atomic_check()
4836 if (intel_crtc_needs_modeset(crtc_state) || in intel_crtc_atomic_check()
4837 intel_crtc_needs_fastset(crtc_state)) { in intel_crtc_atomic_check()
4838 ret = skl_update_scaler_crtc(crtc_state); in intel_crtc_atomic_check()
4843 ret = intel_atomic_setup_scalers(dev_priv, crtc, crtc_state); in intel_crtc_atomic_check()
4871 struct intel_crtc_state *crtc_state) in compute_sink_pipe_bpp() argument
4874 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); in compute_sink_pipe_bpp()
4896 if (bpp < crtc_state->pipe_bpp) { in compute_sink_pipe_bpp()
4903 crtc_state->pipe_bpp); in compute_sink_pipe_bpp()
4905 crtc_state->pipe_bpp = bpp; in compute_sink_pipe_bpp()
4916 struct intel_crtc_state *crtc_state = in compute_baseline_pipe_bpp() local
4930 crtc_state->pipe_bpp = bpp; in compute_baseline_pipe_bpp()
4939 ret = compute_sink_pipe_bpp(connector_state, crtc_state); in compute_baseline_pipe_bpp()
5020 struct intel_crtc_state *crtc_state = in intel_crtc_copy_uapi_to_hw_state_nomodeset() local
5023 WARN_ON(intel_crtc_is_bigjoiner_slave(crtc_state)); in intel_crtc_copy_uapi_to_hw_state_nomodeset()
5025 drm_property_replace_blob(&crtc_state->hw.degamma_lut, in intel_crtc_copy_uapi_to_hw_state_nomodeset()
5026 crtc_state->uapi.degamma_lut); in intel_crtc_copy_uapi_to_hw_state_nomodeset()
5027 drm_property_replace_blob(&crtc_state->hw.gamma_lut, in intel_crtc_copy_uapi_to_hw_state_nomodeset()
5028 crtc_state->uapi.gamma_lut); in intel_crtc_copy_uapi_to_hw_state_nomodeset()
5029 drm_property_replace_blob(&crtc_state->hw.ctm, in intel_crtc_copy_uapi_to_hw_state_nomodeset()
5030 crtc_state->uapi.ctm); in intel_crtc_copy_uapi_to_hw_state_nomodeset()
5037 struct intel_crtc_state *crtc_state = in intel_crtc_copy_uapi_to_hw_state_modeset() local
5040 WARN_ON(intel_crtc_is_bigjoiner_slave(crtc_state)); in intel_crtc_copy_uapi_to_hw_state_modeset()
5042 crtc_state->hw.enable = crtc_state->uapi.enable; in intel_crtc_copy_uapi_to_hw_state_modeset()
5043 crtc_state->hw.active = crtc_state->uapi.active; in intel_crtc_copy_uapi_to_hw_state_modeset()
5044 drm_mode_copy(&crtc_state->hw.mode, in intel_crtc_copy_uapi_to_hw_state_modeset()
5045 &crtc_state->uapi.mode); in intel_crtc_copy_uapi_to_hw_state_modeset()
5046 drm_mode_copy(&crtc_state->hw.adjusted_mode, in intel_crtc_copy_uapi_to_hw_state_modeset()
5047 &crtc_state->uapi.adjusted_mode); in intel_crtc_copy_uapi_to_hw_state_modeset()
5048 crtc_state->hw.scaling_filter = crtc_state->uapi.scaling_filter; in intel_crtc_copy_uapi_to_hw_state_modeset()
5130 struct intel_crtc_state *crtc_state = in intel_crtc_prepare_cleared_state() local
5140 intel_crtc_free_hw_state(crtc_state); in intel_crtc_prepare_cleared_state()
5147 saved_state->uapi = crtc_state->uapi; in intel_crtc_prepare_cleared_state()
5148 saved_state->scaler_state = crtc_state->scaler_state; in intel_crtc_prepare_cleared_state()
5149 saved_state->shared_dpll = crtc_state->shared_dpll; in intel_crtc_prepare_cleared_state()
5150 saved_state->dpll_hw_state = crtc_state->dpll_hw_state; in intel_crtc_prepare_cleared_state()
5151 memcpy(saved_state->icl_port_dplls, crtc_state->icl_port_dplls, in intel_crtc_prepare_cleared_state()
5153 saved_state->crc_enabled = crtc_state->crc_enabled; in intel_crtc_prepare_cleared_state()
5156 saved_state->wm = crtc_state->wm; in intel_crtc_prepare_cleared_state()
5158 memcpy(crtc_state, saved_state, sizeof(*crtc_state)); in intel_crtc_prepare_cleared_state()
5171 struct intel_crtc_state *crtc_state = in intel_modeset_pipe_config() local
5179 crtc_state->cpu_transcoder = (enum transcoder) crtc->pipe; in intel_modeset_pipe_config()
5181 crtc_state->framestart_delay = 1; in intel_modeset_pipe_config()
5188 if (!(crtc_state->hw.adjusted_mode.flags & in intel_modeset_pipe_config()
5190 crtc_state->hw.adjusted_mode.flags |= DRM_MODE_FLAG_NHSYNC; in intel_modeset_pipe_config()
5192 if (!(crtc_state->hw.adjusted_mode.flags & in intel_modeset_pipe_config()
5194 crtc_state->hw.adjusted_mode.flags |= DRM_MODE_FLAG_NVSYNC; in intel_modeset_pipe_config()
5200 base_bpp = crtc_state->pipe_bpp; in intel_modeset_pipe_config()
5210 drm_mode_get_hv_timing(&crtc_state->hw.mode, in intel_modeset_pipe_config()
5212 drm_rect_init(&crtc_state->pipe_src, 0, 0, in intel_modeset_pipe_config()
5234 crtc_state->output_types |= in intel_modeset_pipe_config()
5235 BIT(encoder->compute_output_type(encoder, crtc_state, in intel_modeset_pipe_config()
5238 crtc_state->output_types |= BIT(encoder->type); in intel_modeset_pipe_config()
5243 crtc_state->port_clock = 0; in intel_modeset_pipe_config()
5244 crtc_state->pixel_multiplier = 1; in intel_modeset_pipe_config()
5247 drm_mode_set_crtcinfo(&crtc_state->hw.adjusted_mode, in intel_modeset_pipe_config()
5261 ret = encoder->compute_config(encoder, crtc_state, in intel_modeset_pipe_config()
5274 if (!crtc_state->port_clock) in intel_modeset_pipe_config()
5275 crtc_state->port_clock = crtc_state->hw.adjusted_mode.crtc_clock in intel_modeset_pipe_config()
5276 * crtc_state->pixel_multiplier; in intel_modeset_pipe_config()
5302 crtc_state->dither = (crtc_state->pipe_bpp == 6*3) && in intel_modeset_pipe_config()
5303 !crtc_state->dither_force_disable; in intel_modeset_pipe_config()
5307 base_bpp, crtc_state->pipe_bpp, crtc_state->dither); in intel_modeset_pipe_config()
5316 struct intel_crtc_state *crtc_state = in intel_modeset_pipe_config_late() local
5322 intel_bigjoiner_adjust_pipe_src(crtc_state); in intel_modeset_pipe_config_late()
5334 ret = encoder->compute_config_late(encoder, crtc_state, in intel_modeset_pipe_config_late()
5915 struct intel_crtc_state *crtc_state; in intel_modeset_all_pipes() local
5918 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); in intel_modeset_all_pipes()
5919 if (IS_ERR(crtc_state)) in intel_modeset_all_pipes()
5920 return PTR_ERR(crtc_state); in intel_modeset_all_pipes()
5922 if (!crtc_state->hw.active || in intel_modeset_all_pipes()
5923 intel_crtc_needs_modeset(crtc_state)) in intel_modeset_all_pipes()
5929 crtc_state->uapi.mode_changed = true; in intel_modeset_all_pipes()
5930 crtc_state->update_pipe = false; in intel_modeset_all_pipes()
5945 crtc_state->update_planes |= crtc_state->active_planes; in intel_modeset_all_pipes()
5951 void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state) in intel_crtc_update_active_timings() argument
5953 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_update_active_timings()
5957 drm_mode_init(&adjusted_mode, &crtc_state->hw.adjusted_mode); in intel_crtc_update_active_timings()
5959 if (crtc_state->vrr.enable) { in intel_crtc_update_active_timings()
5960 adjusted_mode.crtc_vtotal = crtc_state->vrr.vmax; in intel_crtc_update_active_timings()
5961 adjusted_mode.crtc_vblank_end = crtc_state->vrr.vmax; in intel_crtc_update_active_timings()
5962 adjusted_mode.crtc_vblank_start = intel_vrr_vmin_vblank_start(crtc_state); in intel_crtc_update_active_timings()
5963 crtc->vmax_vblank_start = intel_vrr_vmax_vblank_start(crtc_state); in intel_crtc_update_active_timings()
5968 crtc->mode_flags = crtc_state->mode_flags; in intel_crtc_update_active_timings()
6006 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { in intel_crtc_update_active_timings()
6021 struct intel_crtc_state *crtc_state; in hsw_mode_set_planes_workaround() local
6029 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in hsw_mode_set_planes_workaround()
6030 if (!crtc_state->hw.active || in hsw_mode_set_planes_workaround()
6031 !intel_crtc_needs_modeset(crtc_state)) in hsw_mode_set_planes_workaround()
6035 other_crtc_state = crtc_state; in hsw_mode_set_planes_workaround()
6038 first_crtc_state = crtc_state; in hsw_mode_set_planes_workaround()
6049 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); in hsw_mode_set_planes_workaround()
6050 if (IS_ERR(crtc_state)) in hsw_mode_set_planes_workaround()
6051 return PTR_ERR(crtc_state); in hsw_mode_set_planes_workaround()
6053 crtc_state->hsw_workaround_pipe = INVALID_PIPE; in hsw_mode_set_planes_workaround()
6055 if (!crtc_state->hw.active || in hsw_mode_set_planes_workaround()
6056 intel_crtc_needs_modeset(crtc_state)) in hsw_mode_set_planes_workaround()
6077 const struct intel_crtc_state *crtc_state; in intel_calc_active_pipes() local
6081 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in intel_calc_active_pipes()
6082 if (crtc_state->hw.active) in intel_calc_active_pipes()
6176 const struct intel_crtc_state *crtc_state; in intel_bigjoiner_add_affected_planes() local
6180 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in intel_bigjoiner_add_affected_planes()
6184 crtc_state->bigjoiner_pipes) { in intel_bigjoiner_add_affected_planes()
6258 struct intel_crtc_state *crtc_state; in intel_atomic_check_crtcs() local
6262 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in intel_atomic_check_crtcs()
6649 struct intel_crtc_state *crtc_state; in intel_bigjoiner_add_affected_crtcs() local
6655 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in intel_bigjoiner_add_affected_crtcs()
6656 affected_pipes |= crtc_state->bigjoiner_pipes; in intel_bigjoiner_add_affected_crtcs()
6657 if (intel_crtc_needs_modeset(crtc_state)) in intel_bigjoiner_add_affected_crtcs()
6658 modeset_pipes |= crtc_state->bigjoiner_pipes; in intel_bigjoiner_add_affected_crtcs()
6662 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); in intel_bigjoiner_add_affected_crtcs()
6663 if (IS_ERR(crtc_state)) in intel_bigjoiner_add_affected_crtcs()
6664 return PTR_ERR(crtc_state); in intel_bigjoiner_add_affected_crtcs()
6670 crtc_state = intel_atomic_get_new_crtc_state(state, crtc); in intel_bigjoiner_add_affected_crtcs()
6672 crtc_state->uapi.mode_changed = true; in intel_bigjoiner_add_affected_crtcs()
6683 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in intel_bigjoiner_add_affected_crtcs()
6685 if (intel_crtc_needs_modeset(crtc_state) && in intel_bigjoiner_add_affected_crtcs()
6686 intel_crtc_is_bigjoiner_master(crtc_state)) in intel_bigjoiner_add_affected_crtcs()
6922 struct intel_crtc_state *crtc_state; in intel_atomic_prepare_commit() local
6930 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in intel_atomic_prepare_commit()
6931 if (intel_crtc_needs_color_update(crtc_state)) in intel_atomic_prepare_commit()
6932 intel_color_prepare_commit(crtc_state); in intel_atomic_prepare_commit()
6939 struct intel_crtc_state *crtc_state) in intel_crtc_arm_fifo_underrun() argument
6943 if (DISPLAY_VER(dev_priv) != 2 || crtc_state->active_planes) in intel_crtc_arm_fifo_underrun()
6946 if (crtc_state->has_pch_encoder) { in intel_crtc_arm_fifo_underrun()
8365 struct intel_crtc_state *crtc_state; in sanitize_watermarks_add_affected() local
8367 crtc_state = intel_atomic_get_crtc_state(state, crtc); in sanitize_watermarks_add_affected()
8368 if (IS_ERR(crtc_state)) in sanitize_watermarks_add_affected()
8369 return PTR_ERR(crtc_state); in sanitize_watermarks_add_affected()
8371 if (crtc_state->hw.active) { in sanitize_watermarks_add_affected()
8376 crtc_state->inherited = true; in sanitize_watermarks_add_affected()
8406 struct intel_crtc_state *crtc_state; in sanitize_watermarks() local
8443 for_each_new_intel_crtc_in_state(intel_state, crtc, crtc_state, i) { in sanitize_watermarks()
8444 crtc_state->wm.need_postvbl_update = true; in sanitize_watermarks()
8447 to_intel_crtc_state(crtc->base.state)->wm = crtc_state->wm; in sanitize_watermarks()
8494 struct intel_crtc_state *crtc_state = in intel_initial_commit() local
8497 if (IS_ERR(crtc_state)) { in intel_initial_commit()
8498 ret = PTR_ERR(crtc_state); in intel_initial_commit()
8502 if (crtc_state->hw.active) { in intel_initial_commit()
8512 crtc_state->inherited = true; in intel_initial_commit()
8524 crtc_state->uapi.color_mgmt_changed = true; in intel_initial_commit()
8527 crtc_state->uapi.encoder_mask) { in intel_initial_commit()
8529 !encoder->initial_fastset_check(encoder, crtc_state)) { in intel_initial_commit()