Lines Matching refs:pipe_mode
2420 u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock; in ilk_pipe_pixel_rate()
2467 crtc_state->hw.pipe_mode.crtc_clock; in intel_crtc_compute_pixel_rate()
2517 struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_readout_derived_state() local
2524 drm_mode_copy(pipe_mode, adjusted_mode); in intel_crtc_readout_derived_state()
2527 intel_splitter_adjust_timings(crtc_state, pipe_mode); in intel_crtc_readout_derived_state()
2534 intel_mode_from_crtc_timings(adjusted_mode, pipe_mode); in intel_crtc_readout_derived_state()
2537 drm_mode_copy(mode, pipe_mode); in intel_crtc_readout_derived_state()
2544 intel_bigjoiner_adjust_timings(crtc_state, pipe_mode); in intel_crtc_readout_derived_state()
2545 intel_mode_from_crtc_timings(pipe_mode, pipe_mode); in intel_crtc_readout_derived_state()
2611 struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_compute_pipe_mode() local
2618 drm_mode_copy(pipe_mode, adjusted_mode); in intel_crtc_compute_pipe_mode()
2621 intel_splitter_adjust_timings(crtc_state, pipe_mode); in intel_crtc_compute_pipe_mode()
2624 intel_bigjoiner_adjust_timings(crtc_state, pipe_mode); in intel_crtc_compute_pipe_mode()
2625 intel_mode_from_crtc_timings(pipe_mode, pipe_mode); in intel_crtc_compute_pipe_mode()
2635 pipe_mode->crtc_clock > clock_limit) { in intel_crtc_compute_pipe_mode()
2641 if (pipe_mode->crtc_clock > clock_limit) { in intel_crtc_compute_pipe_mode()
2645 pipe_mode->crtc_clock, clock_limit, in intel_crtc_compute_pipe_mode()
4707 const struct drm_display_mode *pipe_mode = in hsw_linetime_wm() local
4708 &crtc_state->hw.pipe_mode; in hsw_linetime_wm()
4714 linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8, in hsw_linetime_wm()
4715 pipe_mode->crtc_clock); in hsw_linetime_wm()
4723 const struct drm_display_mode *pipe_mode = in hsw_ips_linetime_wm() local
4724 &crtc_state->hw.pipe_mode; in hsw_ips_linetime_wm()
4730 linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8, in hsw_ips_linetime_wm()
4740 const struct drm_display_mode *pipe_mode = in skl_linetime_wm() local
4741 &crtc_state->hw.pipe_mode; in skl_linetime_wm()
4747 linetime_wm = DIV_ROUND_UP(pipe_mode->crtc_htotal * 1000 * 8, in skl_linetime_wm()
5108 drm_mode_copy(&slave_crtc_state->hw.pipe_mode, in copy_bigjoiner_crtc_state_modeset()
5109 &master_crtc_state->hw.pipe_mode); in copy_bigjoiner_crtc_state_modeset()
5716 PIPE_CONF_CHECK_TIMINGS(hw.pipe_mode); in intel_pipe_config_compare()
5838 PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock); in intel_pipe_config_compare()