Lines Matching refs:display
257 power_domains = &dev_priv->display.power.domains; in intel_display_power_is_enabled()
282 if (dev_priv->display.dmc.allowed_dc_mask & target_dc_state) in sanitize_target_dc_state()
305 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_display_power_set_target_dc_state()
315 if (state == dev_priv->display.dmc.target_dc_state) in intel_display_power_set_target_dc_state()
326 dev_priv->display.dmc.target_dc_state = state; in intel_display_power_set_target_dc_state()
353 display.power.domains); in assert_async_put_domain_masks_disjoint()
366 display.power.domains); in __async_put_domains_state_ok()
389 display.power.domains); in print_power_domains()
404 display.power.domains); in print_async_put_domains_state()
459 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_display_power_grab_async_put_ref()
488 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in __intel_display_power_get_domain()
515 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_display_power_get()
541 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_display_power_get_if_enabled()
577 power_domains = &dev_priv->display.power.domains; in __intel_display_power_put_domain()
597 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in __intel_display_power_put()
610 display.power.domains); in queue_async_put_domains_work()
624 display.power.domains); in release_async_put_domains()
651 display.power.domains.async_put_work.work); in intel_display_power_put_async_work()
652 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_display_power_put_async_work()
712 struct i915_power_domains *power_domains = &i915->display.power.domains; in __intel_display_power_put_async()
760 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_display_power_flush_work()
793 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_display_power_flush_work_sync()
990 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_power_domains_init()
995 dev_priv->display.dmc.allowed_dc_mask = in intel_power_domains_init()
998 dev_priv->display.dmc.target_dc_state = in intel_power_domains_init()
1017 intel_display_power_map_cleanup(&dev_priv->display.power.domains); in intel_power_domains_cleanup()
1022 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_power_domains_sync_hw()
1051 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in gen9_dbuf_slices_update()
1052 u8 slice_mask = INTEL_INFO(dev_priv)->display.dbuf.slice_mask; in gen9_dbuf_slices_update()
1074 dev_priv->display.dbuf.enabled_slices = req_slices; in gen9_dbuf_slices_update()
1081 dev_priv->display.dbuf.enabled_slices = in gen9_dbuf_enable()
1089 dev_priv->display.dbuf.enabled_slices); in gen9_dbuf_enable()
1112 unsigned long abox_regs = INTEL_INFO(dev_priv)->display.abox_mask; in icl_mbus_init()
1322 intel_cdclk_dump_config(dev_priv, &dev_priv->display.cdclk.hw, "Current CDCLK"); in hsw_restore_lcpll()
1410 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in skl_display_core_init()
1442 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in skl_display_core_uninit()
1476 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in bxt_display_core_init()
1510 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in bxt_display_core_uninit()
1575 unsigned long abox_mask = INTEL_INFO(dev_priv)->display.abox_mask; in tgl_bw_buddy_init()
1619 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in icl_display_core_init()
1686 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in icl_display_core_uninit()
1731 dev_priv->display.power.chv_phy_control = in chv_phy_control_init()
1753 dev_priv->display.power.chv_phy_control |= in chv_phy_control_init()
1756 dev_priv->display.power.chv_phy_control |= in chv_phy_control_init()
1763 dev_priv->display.power.chv_phy_control |= in chv_phy_control_init()
1766 dev_priv->display.power.chv_phy_control |= in chv_phy_control_init()
1769 dev_priv->display.power.chv_phy_control |= PHY_COM_LANE_RESET_DEASSERT(DPIO_PHY0); in chv_phy_control_init()
1771 dev_priv->display.power.chv_phy_assert[DPIO_PHY0] = false; in chv_phy_control_init()
1773 dev_priv->display.power.chv_phy_assert[DPIO_PHY0] = true; in chv_phy_control_init()
1785 dev_priv->display.power.chv_phy_control |= in chv_phy_control_init()
1788 dev_priv->display.power.chv_phy_control |= in chv_phy_control_init()
1791 dev_priv->display.power.chv_phy_control |= PHY_COM_LANE_RESET_DEASSERT(DPIO_PHY1); in chv_phy_control_init()
1793 dev_priv->display.power.chv_phy_assert[DPIO_PHY1] = false; in chv_phy_control_init()
1795 dev_priv->display.power.chv_phy_assert[DPIO_PHY1] = true; in chv_phy_control_init()
1799 dev_priv->display.power.chv_phy_control); in chv_phy_control_init()
1883 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_power_domains_init_hw()
1924 i915->display.power.domains.disable_wakeref = intel_display_power_get(i915, in intel_power_domains_init_hw()
1946 fetch_and_zero(&i915->display.power.domains.init_wakeref); in intel_power_domains_driver_remove()
1951 fetch_and_zero(&i915->display.power.domains.disable_wakeref)); in intel_power_domains_driver_remove()
1973 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_power_domains_sanitize_state()
2007 fetch_and_zero(&i915->display.power.domains.init_wakeref); in intel_power_domains_enable()
2022 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_power_domains_disable()
2045 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_power_domains_suspend()
2058 if (!(i915->display.dmc.allowed_dc_mask & DC_STATE_EN_DC9) && in intel_power_domains_suspend()
2072 fetch_and_zero(&i915->display.power.domains.disable_wakeref)); in intel_power_domains_suspend()
2099 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_power_domains_resume()
2117 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_power_domains_dump_info()
2145 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_power_domains_verify_state()
2251 if (i915->display.dmc.allowed_dc_mask & in intel_display_power_resume()
2254 else if (i915->display.dmc.allowed_dc_mask & in intel_display_power_resume()
2262 (i915->display.dmc.allowed_dc_mask & DC_STATE_EN_UPTO_DC5)) in intel_display_power_resume()
2271 struct i915_power_domains *power_domains = &i915->display.power.domains; in intel_display_power_debug()