Lines Matching refs:dmc
254 return i915->display.dmc.dmc_info[dmc_id].payload; in has_dmc_id_fw()
443 struct intel_dmc *dmc = &dev_priv->display.dmc; in intel_dmc_load_program() local
458 for (i = 0; i < dmc->dmc_info[id].dmc_fw_size; i++) { in intel_dmc_load_program()
460 DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i), in intel_dmc_load_program()
461 dmc->dmc_info[id].payload[i]); in intel_dmc_load_program()
468 for (i = 0; i < dmc->dmc_info[id].mmio_count; i++) { in intel_dmc_load_program()
469 intel_de_write(dev_priv, dmc->dmc_info[id].mmioaddr[i], in intel_dmc_load_program()
470 dmc->dmc_info[id].mmiodata[i]); in intel_dmc_load_program()
474 dev_priv->display.dmc.dc_state = 0; in intel_dmc_load_program()
508 … !intel_de_read(i915, DMC_PROGRAM(i915->display.dmc.dmc_info[DMC_FW_MAIN].start_mmioaddr, 0)), in assert_dmc_loaded()
537 static void dmc_set_fw_offset(struct intel_dmc *dmc, in dmc_set_fw_offset() argument
545 struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc); in dmc_set_fw_offset()
559 if (dmc->dmc_info[id].present) in dmc_set_fw_offset()
563 dmc->dmc_info[id].present = true; in dmc_set_fw_offset()
564 dmc->dmc_info[id].dmc_offset = fw_info[i].offset; in dmc_set_fw_offset()
569 static bool dmc_mmio_addr_sanity_check(struct intel_dmc *dmc, in dmc_mmio_addr_sanity_check() argument
573 struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc); in dmc_mmio_addr_sanity_check()
607 static u32 parse_dmc_fw_header(struct intel_dmc *dmc, in parse_dmc_fw_header() argument
611 struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc); in parse_dmc_fw_header()
612 struct dmc_fw_info *dmc_info = &dmc->dmc_info[dmc_id]; in parse_dmc_fw_header()
676 if (!dmc_mmio_addr_sanity_check(dmc, mmioaddr, mmio_count, in parse_dmc_fw_header()
696 if (payload_size > dmc->max_fw_size) { in parse_dmc_fw_header()
717 parse_dmc_fw_package(struct intel_dmc *dmc, in parse_dmc_fw_package() argument
722 struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc); in parse_dmc_fw_package()
760 dmc_set_fw_offset(dmc, fw_info, num_entries, si, in parse_dmc_fw_package()
772 static u32 parse_dmc_fw_css(struct intel_dmc *dmc, in parse_dmc_fw_css() argument
776 struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc); in parse_dmc_fw_css()
791 dmc->version = css_header->version; in parse_dmc_fw_css()
802 struct intel_dmc *dmc = &dev_priv->display.dmc; in parse_dmc_fw() local
814 r = parse_dmc_fw_css(dmc, css_header, fw->size); in parse_dmc_fw()
822 r = parse_dmc_fw_package(dmc, package_header, si, fw->size - readcount); in parse_dmc_fw()
829 if (!dev_priv->display.dmc.dmc_info[id].present) in parse_dmc_fw()
832 offset = readcount + dmc->dmc_info[id].dmc_offset * 4; in parse_dmc_fw()
839 parse_dmc_fw_header(dmc, dmc_header, fw->size - offset, id); in parse_dmc_fw()
845 drm_WARN_ON(&dev_priv->drm, dev_priv->display.dmc.wakeref); in intel_dmc_runtime_pm_get()
846 dev_priv->display.dmc.wakeref = in intel_dmc_runtime_pm_get()
853 fetch_and_zero(&dev_priv->display.dmc.wakeref); in intel_dmc_runtime_pm_put()
869 struct intel_dmc *dmc; in dmc_load_work_fn() local
874 dev_priv = container_of(work, typeof(*dev_priv), display.dmc.work); in dmc_load_work_fn()
875 dmc = &dev_priv->display.dmc; in dmc_load_work_fn()
877 err = request_firmware(&fw, dev_priv->display.dmc.fw_path, dev_priv->drm.dev); in dmc_load_work_fn()
884 dmc->fw_path, in dmc_load_work_fn()
888 dev_priv->display.dmc.fw_path = fallback_path; in dmc_load_work_fn()
900 dev_priv->display.dmc.fw_path, DMC_VERSION_MAJOR(dmc->version), in dmc_load_work_fn()
901 DMC_VERSION_MINOR(dmc->version)); in dmc_load_work_fn()
906 dmc->fw_path); in dmc_load_work_fn()
923 struct intel_dmc *dmc = &dev_priv->display.dmc; in intel_dmc_ucode_init() local
925 INIT_WORK(&dev_priv->display.dmc.work, dmc_load_work_fn); in intel_dmc_ucode_init()
941 dmc->fw_path = DG2_DMC_PATH; in intel_dmc_ucode_init()
942 dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
944 dmc->fw_path = ADLP_DMC_PATH; in intel_dmc_ucode_init()
945 dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
947 dmc->fw_path = ADLS_DMC_PATH; in intel_dmc_ucode_init()
948 dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
950 dmc->fw_path = DG1_DMC_PATH; in intel_dmc_ucode_init()
951 dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
953 dmc->fw_path = RKL_DMC_PATH; in intel_dmc_ucode_init()
954 dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
956 dmc->fw_path = TGL_DMC_PATH; in intel_dmc_ucode_init()
957 dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
959 dmc->fw_path = ICL_DMC_PATH; in intel_dmc_ucode_init()
960 dmc->max_fw_size = ICL_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
962 dmc->fw_path = GLK_DMC_PATH; in intel_dmc_ucode_init()
963 dmc->max_fw_size = GLK_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
967 dmc->fw_path = KBL_DMC_PATH; in intel_dmc_ucode_init()
968 dmc->max_fw_size = KBL_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
970 dmc->fw_path = SKL_DMC_PATH; in intel_dmc_ucode_init()
971 dmc->max_fw_size = SKL_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
973 dmc->fw_path = BXT_DMC_PATH; in intel_dmc_ucode_init()
974 dmc->max_fw_size = BXT_DMC_MAX_FW_SIZE; in intel_dmc_ucode_init()
979 dmc->fw_path = NULL; in intel_dmc_ucode_init()
985 dmc->fw_path = dev_priv->params.dmc_firmware_path; in intel_dmc_ucode_init()
988 if (!dmc->fw_path) { in intel_dmc_ucode_init()
994 drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path); in intel_dmc_ucode_init()
995 schedule_work(&dev_priv->display.dmc.work); in intel_dmc_ucode_init()
1011 flush_work(&dev_priv->display.dmc.work); in intel_dmc_ucode_suspend()
1053 drm_WARN_ON(&dev_priv->drm, dev_priv->display.dmc.wakeref); in intel_dmc_ucode_fini()
1056 kfree(dev_priv->display.dmc.dmc_info[id].payload); in intel_dmc_ucode_fini()
1062 struct intel_dmc *dmc = &i915->display.dmc; in intel_dmc_print_error_state() local
1070 DMC_VERSION_MAJOR(dmc->version), in intel_dmc_print_error_state()
1071 DMC_VERSION_MINOR(dmc->version)); in intel_dmc_print_error_state()
1078 struct intel_dmc *dmc; in intel_dmc_debugfs_status_show() local
1084 dmc = &i915->display.dmc; in intel_dmc_debugfs_status_show()
1090 seq_printf(m, "path: %s\n", dmc->fw_path); in intel_dmc_debugfs_status_show()
1094 str_yes_no(dmc->dmc_info[DMC_FW_PIPEA].payload)); in intel_dmc_debugfs_status_show()
1099 str_yes_no(dmc->dmc_info[DMC_FW_PIPEB].payload)); in intel_dmc_debugfs_status_show()
1104 seq_printf(m, "version: %d.%d\n", DMC_VERSION_MAJOR(dmc->version), in intel_dmc_debugfs_status_show()
1105 DMC_VERSION_MINOR(dmc->version)); in intel_dmc_debugfs_status_show()
1135 intel_de_read(i915, DMC_PROGRAM(dmc->dmc_info[DMC_FW_MAIN].start_mmioaddr, 0))); in intel_dmc_debugfs_status_show()