Lines Matching refs:dev_priv
21 static void assert_fdi_tx(struct drm_i915_private *dev_priv, in assert_fdi_tx() argument
26 if (HAS_DDI(dev_priv)) { in assert_fdi_tx()
34 cur_state = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE; in assert_fdi_tx()
36 cur_state = intel_de_read(dev_priv, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE; in assert_fdi_tx()
53 static void assert_fdi_rx(struct drm_i915_private *dev_priv, in assert_fdi_rx() argument
58 cur_state = intel_de_read(dev_priv, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE; in assert_fdi_rx()
115 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fdi_link_train() local
117 dev_priv->display.funcs.fdi->fdi_link_train(crtc, crtc_state); in intel_fdi_link_train()
132 struct drm_i915_private *dev_priv = to_i915(dev); in ilk_check_fdi_lanes() local
137 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
141 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
147 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ilk_check_fdi_lanes()
149 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
158 if (INTEL_NUM_PIPES(dev_priv) == 2) in ilk_check_fdi_lanes()
169 other_crtc = intel_crtc_for_pipe(dev_priv, PIPE_C); in ilk_check_fdi_lanes()
176 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
184 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
190 other_crtc = intel_crtc_for_pipe(dev_priv, PIPE_B); in ilk_check_fdi_lanes()
197 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
283 static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool enable) in cpt_set_fdi_bc_bifurcation() argument
287 temp = intel_de_read(dev_priv, SOUTH_CHICKEN1); in cpt_set_fdi_bc_bifurcation()
291 drm_WARN_ON(&dev_priv->drm, in cpt_set_fdi_bc_bifurcation()
292 intel_de_read(dev_priv, FDI_RX_CTL(PIPE_B)) & in cpt_set_fdi_bc_bifurcation()
294 drm_WARN_ON(&dev_priv->drm, in cpt_set_fdi_bc_bifurcation()
295 intel_de_read(dev_priv, FDI_RX_CTL(PIPE_C)) & in cpt_set_fdi_bc_bifurcation()
302 drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n", in cpt_set_fdi_bc_bifurcation()
304 intel_de_write(dev_priv, SOUTH_CHICKEN1, temp); in cpt_set_fdi_bc_bifurcation()
305 intel_de_posting_read(dev_priv, SOUTH_CHICKEN1); in cpt_set_fdi_bc_bifurcation()
311 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ivb_update_fdi_bc_bifurcation() local
318 cpt_set_fdi_bc_bifurcation(dev_priv, false); in ivb_update_fdi_bc_bifurcation()
320 cpt_set_fdi_bc_bifurcation(dev_priv, true); in ivb_update_fdi_bc_bifurcation()
324 cpt_set_fdi_bc_bifurcation(dev_priv, true); in ivb_update_fdi_bc_bifurcation()
335 struct drm_i915_private *dev_priv = to_i915(dev); in intel_fdi_normal_train() local
342 temp = intel_de_read(dev_priv, reg); in intel_fdi_normal_train()
343 if (IS_IVYBRIDGE(dev_priv)) { in intel_fdi_normal_train()
350 intel_de_write(dev_priv, reg, temp); in intel_fdi_normal_train()
353 temp = intel_de_read(dev_priv, reg); in intel_fdi_normal_train()
354 if (HAS_PCH_CPT(dev_priv)) { in intel_fdi_normal_train()
361 intel_de_write(dev_priv, reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE); in intel_fdi_normal_train()
364 intel_de_posting_read(dev_priv, reg); in intel_fdi_normal_train()
368 if (IS_IVYBRIDGE(dev_priv)) in intel_fdi_normal_train()
369 intel_de_write(dev_priv, reg, in intel_fdi_normal_train()
370 intel_de_read(dev_priv, reg) | FDI_FS_ERRC_ENABLE | FDI_FE_ERRC_ENABLE); in intel_fdi_normal_train()
378 struct drm_i915_private *dev_priv = to_i915(dev); in ilk_fdi_link_train() local
387 intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe), in ilk_fdi_link_train()
388 intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK); in ilk_fdi_link_train()
391 assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder); in ilk_fdi_link_train()
396 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
399 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
400 intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
405 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
410 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in ilk_fdi_link_train()
413 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
416 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in ilk_fdi_link_train()
418 intel_de_posting_read(dev_priv, reg); in ilk_fdi_link_train()
422 intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe), in ilk_fdi_link_train()
424 intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe), in ilk_fdi_link_train()
429 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
430 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
433 drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n"); in ilk_fdi_link_train()
434 intel_de_write(dev_priv, reg, temp | FDI_RX_BIT_LOCK); in ilk_fdi_link_train()
439 drm_err(&dev_priv->drm, "FDI train 1 fail!\n"); in ilk_fdi_link_train()
443 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
446 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
449 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
452 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
454 intel_de_posting_read(dev_priv, reg); in ilk_fdi_link_train()
459 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
460 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
463 intel_de_write(dev_priv, reg, in ilk_fdi_link_train()
465 drm_dbg_kms(&dev_priv->drm, "FDI train 2 done.\n"); in ilk_fdi_link_train()
470 drm_err(&dev_priv->drm, "FDI train 2 fail!\n"); in ilk_fdi_link_train()
472 drm_dbg_kms(&dev_priv->drm, "FDI train done\n"); in ilk_fdi_link_train()
488 struct drm_i915_private *dev_priv = to_i915(dev); in gen6_fdi_link_train() local
497 intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe), in gen6_fdi_link_train()
498 intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK); in gen6_fdi_link_train()
503 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
506 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
508 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
513 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
521 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in gen6_fdi_link_train()
523 intel_de_write(dev_priv, FDI_RX_MISC(pipe), in gen6_fdi_link_train()
527 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
528 if (HAS_PCH_CPT(dev_priv)) { in gen6_fdi_link_train()
535 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in gen6_fdi_link_train()
537 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
542 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
545 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
547 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
552 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
553 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in gen6_fdi_link_train()
555 intel_de_write(dev_priv, reg, in gen6_fdi_link_train()
557 drm_dbg_kms(&dev_priv->drm, in gen6_fdi_link_train()
567 drm_err(&dev_priv->drm, "FDI train 1 fail!\n"); in gen6_fdi_link_train()
571 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
574 if (IS_SANDYBRIDGE(dev_priv)) { in gen6_fdi_link_train()
579 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
582 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
583 if (HAS_PCH_CPT(dev_priv)) { in gen6_fdi_link_train()
590 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
592 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
597 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
600 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
602 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
607 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
608 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in gen6_fdi_link_train()
610 intel_de_write(dev_priv, reg, in gen6_fdi_link_train()
612 drm_dbg_kms(&dev_priv->drm, in gen6_fdi_link_train()
622 drm_err(&dev_priv->drm, "FDI train 2 fail!\n"); in gen6_fdi_link_train()
624 drm_dbg_kms(&dev_priv->drm, "FDI train done.\n"); in gen6_fdi_link_train()
632 struct drm_i915_private *dev_priv = to_i915(dev); in ivb_manual_fdi_link_train() local
643 intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe), in ivb_manual_fdi_link_train()
644 intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK); in ivb_manual_fdi_link_train()
649 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
652 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
654 intel_de_posting_read(dev_priv, reg); in ivb_manual_fdi_link_train()
657 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR before link train 0x%x\n", in ivb_manual_fdi_link_train()
658 intel_de_read(dev_priv, FDI_RX_IIR(pipe))); in ivb_manual_fdi_link_train()
664 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
667 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
670 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
674 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
678 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
685 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in ivb_manual_fdi_link_train()
687 intel_de_write(dev_priv, FDI_RX_MISC(pipe), in ivb_manual_fdi_link_train()
691 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
694 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in ivb_manual_fdi_link_train()
696 intel_de_posting_read(dev_priv, reg); in ivb_manual_fdi_link_train()
701 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
702 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ivb_manual_fdi_link_train()
705 (intel_de_read(dev_priv, reg) & FDI_RX_BIT_LOCK)) { in ivb_manual_fdi_link_train()
706 intel_de_write(dev_priv, reg, in ivb_manual_fdi_link_train()
708 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
716 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
723 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
726 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
729 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
732 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
734 intel_de_posting_read(dev_priv, reg); in ivb_manual_fdi_link_train()
739 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
740 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ivb_manual_fdi_link_train()
743 (intel_de_read(dev_priv, reg) & FDI_RX_SYMBOL_LOCK)) { in ivb_manual_fdi_link_train()
744 intel_de_write(dev_priv, reg, in ivb_manual_fdi_link_train()
746 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
754 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
759 drm_dbg_kms(&dev_priv->drm, "FDI train done.\n"); in ivb_manual_fdi_link_train()
774 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in hsw_fdi_link_train() local
789 intel_de_write(dev_priv, FDI_RX_MISC(PIPE_A), in hsw_fdi_link_train()
793 rx_ctl_val = dev_priv->display.fdi.rx_config | FDI_RX_ENHANCE_FRAME_ENABLE | in hsw_fdi_link_train()
796 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
797 intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
802 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
805 drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
812 intel_de_write(dev_priv, DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
822 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), in hsw_fdi_link_train()
824 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
829 intel_de_write(dev_priv, FDI_RX_TUSIZE1(PIPE_A), TU_SIZE(64)); in hsw_fdi_link_train()
833 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
834 intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
840 temp = intel_de_read(dev_priv, FDI_RX_MISC(PIPE_A)); in hsw_fdi_link_train()
842 intel_de_write(dev_priv, FDI_RX_MISC(PIPE_A), temp); in hsw_fdi_link_train()
843 intel_de_posting_read(dev_priv, FDI_RX_MISC(PIPE_A)); in hsw_fdi_link_train()
848 temp = intel_de_read(dev_priv, DP_TP_STATUS(PORT_E)); in hsw_fdi_link_train()
850 drm_dbg_kms(&dev_priv->drm, in hsw_fdi_link_train()
860 drm_err(&dev_priv->drm, "FDI link training failed!\n"); in hsw_fdi_link_train()
865 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
866 intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
868 temp = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
870 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), temp); in hsw_fdi_link_train()
871 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
874 temp = intel_de_read(dev_priv, DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
877 intel_de_write(dev_priv, DP_TP_CTL(PORT_E), temp); in hsw_fdi_link_train()
878 intel_de_posting_read(dev_priv, DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
880 intel_wait_ddi_buf_idle(dev_priv, PORT_E); in hsw_fdi_link_train()
883 temp = intel_de_read(dev_priv, FDI_RX_MISC(PIPE_A)); in hsw_fdi_link_train()
886 intel_de_write(dev_priv, FDI_RX_MISC(PIPE_A), temp); in hsw_fdi_link_train()
887 intel_de_posting_read(dev_priv, FDI_RX_MISC(PIPE_A)); in hsw_fdi_link_train()
891 intel_de_write(dev_priv, DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
900 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_fdi_disable() local
909 val = intel_de_read(dev_priv, FDI_RX_CTL(PIPE_A)); in hsw_fdi_disable()
911 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), val); in hsw_fdi_disable()
913 val = intel_de_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_disable()
915 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), val); in hsw_fdi_disable()
917 intel_wait_ddi_buf_idle(dev_priv, PORT_E); in hsw_fdi_disable()
921 val = intel_de_read(dev_priv, FDI_RX_MISC(PIPE_A)); in hsw_fdi_disable()
924 intel_de_write(dev_priv, FDI_RX_MISC(PIPE_A), val); in hsw_fdi_disable()
926 val = intel_de_read(dev_priv, FDI_RX_CTL(PIPE_A)); in hsw_fdi_disable()
928 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), val); in hsw_fdi_disable()
930 val = intel_de_read(dev_priv, FDI_RX_CTL(PIPE_A)); in hsw_fdi_disable()
932 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), val); in hsw_fdi_disable()
938 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ilk_fdi_pll_enable() local
945 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_enable()
948 temp |= (intel_de_read(dev_priv, PIPECONF(pipe)) & PIPECONF_BPC_MASK) << 11; in ilk_fdi_pll_enable()
949 intel_de_write(dev_priv, reg, temp | FDI_RX_PLL_ENABLE); in ilk_fdi_pll_enable()
951 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_enable()
955 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_enable()
956 intel_de_write(dev_priv, reg, temp | FDI_PCDCLK); in ilk_fdi_pll_enable()
958 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_enable()
963 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_enable()
965 intel_de_write(dev_priv, reg, temp | FDI_TX_PLL_ENABLE); in ilk_fdi_pll_enable()
967 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_enable()
975 struct drm_i915_private *dev_priv = to_i915(dev); in ilk_fdi_pll_disable() local
982 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_disable()
983 intel_de_write(dev_priv, reg, temp & ~FDI_PCDCLK); in ilk_fdi_pll_disable()
987 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_disable()
988 intel_de_write(dev_priv, reg, temp & ~FDI_TX_PLL_ENABLE); in ilk_fdi_pll_disable()
990 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_disable()
994 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_disable()
995 intel_de_write(dev_priv, reg, temp & ~FDI_RX_PLL_ENABLE); in ilk_fdi_pll_disable()
998 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_disable()
1004 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ilk_fdi_disable() local
1011 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1012 intel_de_write(dev_priv, reg, temp & ~FDI_TX_ENABLE); in ilk_fdi_disable()
1013 intel_de_posting_read(dev_priv, reg); in ilk_fdi_disable()
1016 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1018 temp |= (intel_de_read(dev_priv, PIPECONF(pipe)) & PIPECONF_BPC_MASK) << 11; in ilk_fdi_disable()
1019 intel_de_write(dev_priv, reg, temp & ~FDI_RX_ENABLE); in ilk_fdi_disable()
1021 intel_de_posting_read(dev_priv, reg); in ilk_fdi_disable()
1025 if (HAS_PCH_IBX(dev_priv)) in ilk_fdi_disable()
1026 intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe), in ilk_fdi_disable()
1031 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1034 intel_de_write(dev_priv, reg, temp); in ilk_fdi_disable()
1037 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1038 if (HAS_PCH_CPT(dev_priv)) { in ilk_fdi_disable()
1047 temp |= (intel_de_read(dev_priv, PIPECONF(pipe)) & PIPECONF_BPC_MASK) << 11; in ilk_fdi_disable()
1048 intel_de_write(dev_priv, reg, temp); in ilk_fdi_disable()
1050 intel_de_posting_read(dev_priv, reg); in ilk_fdi_disable()
1067 intel_fdi_init_hook(struct drm_i915_private *dev_priv) in intel_fdi_init_hook() argument
1069 if (IS_IRONLAKE(dev_priv)) { in intel_fdi_init_hook()
1070 dev_priv->display.funcs.fdi = &ilk_funcs; in intel_fdi_init_hook()
1071 } else if (IS_SANDYBRIDGE(dev_priv)) { in intel_fdi_init_hook()
1072 dev_priv->display.funcs.fdi = &gen6_funcs; in intel_fdi_init_hook()
1073 } else if (IS_IVYBRIDGE(dev_priv)) { in intel_fdi_init_hook()
1075 dev_priv->display.funcs.fdi = &ivb_funcs; in intel_fdi_init_hook()