Lines Matching refs:sagv
68 i915->display.sagv.status != I915_SAGV_NOT_CONTROLLED; in intel_has_sagv()
105 i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED; in intel_sagv_init()
114 drm_WARN_ON(&i915->drm, i915->display.sagv.status == I915_SAGV_UNKNOWN); in intel_sagv_init()
116 i915->display.sagv.block_time_us = intel_sagv_block_time(i915); in intel_sagv_init()
119 str_yes_no(intel_has_sagv(i915)), i915->display.sagv.block_time_us); in intel_sagv_init()
122 if (drm_WARN(&i915->drm, i915->display.sagv.block_time_us > U16_MAX, in intel_sagv_init()
124 i915->display.sagv.block_time_us)) in intel_sagv_init()
125 i915->display.sagv.block_time_us = 0; in intel_sagv_init()
128 i915->display.sagv.block_time_us = 0; in intel_sagv_init()
149 if (i915->display.sagv.status == I915_SAGV_ENABLED) in skl_sagv_enable()
164 i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED; in skl_sagv_enable()
171 i915->display.sagv.status = I915_SAGV_ENABLED; in skl_sagv_enable()
181 if (i915->display.sagv.status == I915_SAGV_DISABLED) in skl_sagv_disable()
196 i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED; in skl_sagv_disable()
203 i915->display.sagv.status = I915_SAGV_DISABLED; in skl_sagv_disable()
401 if (wm->wm[0].enable && !wm->sagv.wm0.enable) in tgl_crtc_can_enable_sagv()
1363 return &wm->sagv.wm0; in skl_plane_wm_level()
1375 return &wm->sagv.trans_wm; in skl_plane_trans_wm()
1619 skl_check_wm_level(&wm->sagv.wm0, ddb); in skl_crtc_allocate_plane_ddb()
1620 skl_check_wm_level(&wm->sagv.trans_wm, ddb); in skl_crtc_allocate_plane_ddb()
1959 if (DISPLAY_VER(i915) < 12 && i915->display.sagv.block_time_us) in skl_compute_plane_wm()
1960 result->can_sagv = latency >= i915->display.sagv.block_time_us; in skl_compute_plane_wm()
1990 struct skl_wm_level *sagv_wm = &plane_wm->sagv.wm0; in tgl_compute_sagv_wm()
1994 if (i915->display.sagv.block_time_us) in tgl_compute_sagv_wm()
1995 latency = i915->display.sagv.block_time_us + i915->display.wm.skl_latency[0]; in tgl_compute_sagv_wm()
2088 skl_compute_transition_wm(i915, &wm->sagv.trans_wm, in skl_build_plane_wm_single()
2089 &wm->sagv.wm0, &wm_params); in skl_build_plane_wm_single()
2271 &wm->sagv.wm0); in skl_write_plane_wm()
2273 &wm->sagv.trans_wm); in skl_write_plane_wm()
2306 &wm->sagv.wm0); in skl_write_cursor_wm()
2308 &wm->sagv.trans_wm); in skl_write_cursor_wm()
2340 skl_wm_level_equals(&wm1->sagv.wm0, &wm2->sagv.wm0) && in skl_plane_wm_equals()
2341 skl_wm_level_equals(&wm1->sagv.trans_wm, &wm2->sagv.trans_wm); in skl_plane_wm_equals()
2594 enast(old_wm->sagv.wm0.enable), in skl_print_wm_changes()
2595 enast(old_wm->sagv.trans_wm.enable), in skl_print_wm_changes()
2601 enast(new_wm->sagv.wm0.enable), in skl_print_wm_changes()
2602 enast(new_wm->sagv.trans_wm.enable)); in skl_print_wm_changes()
2617 enast(old_wm->sagv.wm0.ignore_lines), old_wm->sagv.wm0.lines, in skl_print_wm_changes()
2618 enast(old_wm->sagv.trans_wm.ignore_lines), old_wm->sagv.trans_wm.lines, in skl_print_wm_changes()
2628 enast(new_wm->sagv.wm0.ignore_lines), new_wm->sagv.wm0.lines, in skl_print_wm_changes()
2629 enast(new_wm->sagv.trans_wm.ignore_lines), new_wm->sagv.trans_wm.lines); in skl_print_wm_changes()
2640 old_wm->sagv.wm0.blocks, in skl_print_wm_changes()
2641 old_wm->sagv.trans_wm.blocks, in skl_print_wm_changes()
2647 new_wm->sagv.wm0.blocks, in skl_print_wm_changes()
2648 new_wm->sagv.trans_wm.blocks); in skl_print_wm_changes()
2659 old_wm->sagv.wm0.min_ddb_alloc, in skl_print_wm_changes()
2660 old_wm->sagv.trans_wm.min_ddb_alloc, in skl_print_wm_changes()
2666 new_wm->sagv.wm0.min_ddb_alloc, in skl_print_wm_changes()
2667 new_wm->sagv.trans_wm.min_ddb_alloc); in skl_print_wm_changes()
2694 if (!skl_wm_level_equals(&old_wm->sagv.wm0, &new_wm->sagv.wm0) || in skl_plane_selected_wm_equals()
2695 !skl_wm_level_equals(&old_wm->sagv.trans_wm, &new_wm->sagv.trans_wm)) in skl_plane_selected_wm_equals()
2844 skl_wm_level_from_reg_val(val, &wm->sagv.wm0); in skl_pipe_wm_get_hw_state()
2851 skl_wm_level_from_reg_val(val, &wm->sagv.trans_wm); in skl_pipe_wm_get_hw_state()
2853 wm->sagv.wm0 = wm->wm[0]; in skl_pipe_wm_get_hw_state()
2854 wm->sagv.trans_wm = wm->trans_wm; in skl_pipe_wm_get_hw_state()
3067 hw_wm_level = &hw->wm.planes[plane->id].sagv.wm0; in intel_wm_state_verify()
3068 sw_wm_level = &sw_wm->planes[plane->id].sagv.wm0; in intel_wm_state_verify()
3083 hw_wm_level = &hw->wm.planes[plane->id].sagv.trans_wm; in intel_wm_state_verify()
3084 sw_wm_level = &sw_wm->planes[plane->id].sagv.trans_wm; in intel_wm_state_verify()