Lines Matching refs:pm_iir
132 rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD; in rps_timer()
137 rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD; in rps_timer()
227 rps->pm_iir = 0; in rps_reset_interrupts()
875 rps->pm_iir = 0; in intel_rps_unpark()
1785 static u32 vlv_wa_c0_ei(struct intel_rps *rps, u32 pm_iir) in vlv_wa_c0_ei() argument
1792 if ((pm_iir & GEN6_PM_RP_UP_EI_EXPIRED) == 0) in vlv_wa_c0_ei()
1832 u32 pm_iir = 0; in rps_work() local
1835 pm_iir = fetch_and_zero(&rps->pm_iir) & rps->pm_events; in rps_work()
1840 if (!pm_iir && !client_boost) in rps_work()
1849 pm_iir |= vlv_wa_c0_ei(rps, pm_iir); in rps_work()
1860 pm_iir, str_yes_no(client_boost), in rps_work()
1866 } else if (pm_iir & GEN6_PM_RP_UP_THRESHOLD) { in rps_work()
1876 } else if (pm_iir & GEN6_PM_RP_DOWN_TIMEOUT) { in rps_work()
1882 } else if (pm_iir & GEN6_PM_RP_DOWN_THRESHOLD) { in rps_work()
1915 void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir) in gen11_rps_irq_handler() argument
1918 const u32 events = rps->pm_events & pm_iir; in gen11_rps_irq_handler()
1929 rps->pm_iir |= events; in gen11_rps_irq_handler()
1933 void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir) in gen6_rps_irq_handler() argument
1938 events = pm_iir & rps->pm_events; in gen6_rps_irq_handler()
1945 rps->pm_iir |= events; in gen6_rps_irq_handler()
1954 if (pm_iir & PM_VEBOX_USER_INTERRUPT) in gen6_rps_irq_handler()
1955 intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10); in gen6_rps_irq_handler()
1957 if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT) in gen6_rps_irq_handler()
1959 "Command parser error, pm_iir 0x%08x\n", pm_iir); in gen6_rps_irq_handler()
2273 u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask; in rps_frequency_dump() local
2327 pm_iir = 0; in rps_frequency_dump()
2332 pm_iir = intel_uncore_read(uncore, GEN8_GT_IIR(2)); in rps_frequency_dump()
2337 pm_iir = intel_uncore_read(uncore, GEN6_PMIIR); in rps_frequency_dump()
2352 pm_isr, pm_iir); in rps_frequency_dump()