Lines Matching refs:rgvswctl
428 u16 rgvswctl; in __gen5_rps_set() local
432 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in __gen5_rps_set()
433 if (rgvswctl & MEMCTL_CMD_STS) { in __gen5_rps_set()
442 rgvswctl = in __gen5_rps_set()
446 intel_uncore_write16(uncore, MEMSWCTL, rgvswctl); in __gen5_rps_set()
449 rgvswctl |= MEMCTL_CMD_STS; in __gen5_rps_set()
450 intel_uncore_write16(uncore, MEMSWCTL, rgvswctl); in __gen5_rps_set()
619 u16 rgvswctl; in gen5_rps_disable() local
627 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in gen5_rps_disable()
636 rgvswctl |= MEMCTL_CMD_STS; in gen5_rps_disable()
637 intel_uncore_write(uncore, MEMSWCTL, rgvswctl); in gen5_rps_disable()