Lines Matching refs:gvt
92 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_ggtt_gmadr_g2h()
110 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in intel_gvt_ggtt_gmadr_h2g()
112 if (drm_WARN(&i915->drm, !gvt_gmadr_is_valid(vgpu->gvt, h_addr), in intel_gvt_ggtt_gmadr_h2g()
116 if (gvt_gmadr_is_aperture(vgpu->gvt, h_addr)) in intel_gvt_ggtt_gmadr_h2g()
118 + (h_addr - gvt_aperture_gmadr_base(vgpu->gvt)); in intel_gvt_ggtt_gmadr_h2g()
121 + (h_addr - gvt_hidden_gmadr_base(vgpu->gvt)); in intel_gvt_ggtt_gmadr_h2g()
321 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; in gtt_get_entry64()
334 e->val64 = read_pte64(vgpu->gvt->gt->ggtt, index); in gtt_get_entry64()
346 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; in gtt_set_entry64()
359 write_pte64(vgpu->gvt->gt->ggtt, index, e->val64); in gtt_set_entry64()
569 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in _ppgtt_get_root_entry()
596 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in _ppgtt_set_root_entry()
612 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in ggtt_get_guest_entry()
624 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in ggtt_set_guest_entry()
635 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in ggtt_get_host_entry()
645 const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; in ggtt_set_host_entry()
670 struct intel_gvt *gvt = spt->vgpu->gvt; in ppgtt_spt_get_entry() local
671 const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; in ppgtt_spt_get_entry()
699 struct intel_gvt *gvt = spt->vgpu->gvt; in ppgtt_spt_set_entry() local
700 const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; in ppgtt_spt_set_entry()
756 struct device *kdev = spt->vgpu->gvt->gt->i915->drm.dev; in ppgtt_free_spt()
835 static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt);
841 struct device *kdev = vgpu->gvt->gt->i915->drm.dev; in ppgtt_alloc_spt()
849 if (reclaim_one_ppgtt_mm(vgpu->gvt)) in ppgtt_alloc_spt()
919 ((spt)->vgpu->gvt->device_info.gtt_entry_size_shift)
928 spt->vgpu->gvt->gtt.pte_ops->test_present(e))
934 spt->vgpu->gvt->gtt.pte_ops->test_present(e))
962 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in ppgtt_invalidate_spt_by_shadow_entry()
963 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in ppgtt_invalidate_spt_by_shadow_entry()
1000 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in ppgtt_invalidate_pte()
1069 struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915; in vgpu_ips_enabled()
1088 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in ppgtt_populate_spt_by_guest_entry()
1152 const struct intel_gvt_gtt_pte_ops *ops = s->vgpu->gvt->gtt.pte_ops; in ppgtt_generate_shadow_entry()
1175 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in is_2MB_gtt_possible()
1178 if (!HAS_PAGE_SIZES(vgpu->gvt->gt->i915, I915_GTT_PAGE_SIZE_2M)) in is_2MB_gtt_possible()
1193 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in split_2MB_gtt_entry()
1249 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in split_64KB_gtt_entry()
1280 const struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops; in ppgtt_populate_shadow_entry()
1332 struct intel_gvt *gvt = vgpu->gvt; in ppgtt_populate_spt() local
1333 const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; in ppgtt_populate_spt()
1355 ops->set_pfn(&se, gvt->gtt.scratch_mfn); in ppgtt_populate_spt()
1376 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in ppgtt_handle_guest_entry_removal()
1455 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; in sync_oos_page()
1456 struct intel_gvt *gvt = vgpu->gvt; in sync_oos_page() local
1457 const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; in sync_oos_page()
1498 struct intel_gvt *gvt = vgpu->gvt; in detach_oos_page() local
1509 list_move_tail(&oos_page->list, &gvt->gtt.oos_page_free_list_head); in detach_oos_page()
1517 struct intel_gvt *gvt = spt->vgpu->gvt; in attach_oos_page() local
1529 list_move_tail(&oos_page->list, &gvt->gtt.oos_page_use_list_head); in attach_oos_page()
1554 struct intel_gvt *gvt = spt->vgpu->gvt; in ppgtt_allocate_oos_page() local
1555 struct intel_gvt_gtt *gtt = &gvt->gtt; in ppgtt_allocate_oos_page()
1628 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in ppgtt_handle_guest_write_page_table()
1745 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in ppgtt_handle_guest_write_page_table_bytes()
1746 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; in ppgtt_handle_guest_write_page_table_bytes()
1808 struct intel_gvt *gvt = vgpu->gvt; in invalidate_ppgtt_mm() local
1809 struct intel_gvt_gtt *gtt = &gvt->gtt; in invalidate_ppgtt_mm()
1838 struct intel_gvt *gvt = vgpu->gvt; in shadow_ppgtt_mm() local
1839 struct intel_gvt_gtt *gtt = &gvt->gtt; in shadow_ppgtt_mm()
1912 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_create_ppgtt_mm() local
1945 mutex_lock(&gvt->gtt.ppgtt_mm_lock); in intel_vgpu_create_ppgtt_mm()
1946 list_add_tail(&mm->ppgtt_mm.lru_list, &gvt->gtt.ppgtt_mm_lru_list_head); in intel_vgpu_create_ppgtt_mm()
1947 mutex_unlock(&gvt->gtt.ppgtt_mm_lock); in intel_vgpu_create_ppgtt_mm()
1963 nr_entries = gvt_ggtt_gm_sz(vgpu->gvt) >> I915_GTT_PAGE_SHIFT; in intel_vgpu_create_ggtt_mm()
1966 vgpu->gvt->device_info.gtt_entry_size)); in intel_vgpu_create_ggtt_mm()
2007 mutex_lock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); in _intel_vgpu_mm_release()
2009 mutex_unlock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); in _intel_vgpu_mm_release()
2054 mutex_lock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); in intel_vgpu_pin_mm()
2056 &mm->vgpu->gvt->gtt.ppgtt_mm_lru_list_head); in intel_vgpu_pin_mm()
2057 mutex_unlock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); in intel_vgpu_pin_mm()
2063 static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt) in reclaim_one_ppgtt_mm() argument
2068 mutex_lock(&gvt->gtt.ppgtt_mm_lock); in reclaim_one_ppgtt_mm()
2070 list_for_each_safe(pos, n, &gvt->gtt.ppgtt_mm_lru_list_head) { in reclaim_one_ppgtt_mm()
2077 mutex_unlock(&gvt->gtt.ppgtt_mm_lock); in reclaim_one_ppgtt_mm()
2081 mutex_unlock(&gvt->gtt.ppgtt_mm_lock); in reclaim_one_ppgtt_mm()
2092 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in ppgtt_get_next_level_entry()
2120 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_gma_to_gpa() local
2121 const struct intel_gvt_gtt_pte_ops *pte_ops = gvt->gtt.pte_ops; in intel_vgpu_gma_to_gpa()
2122 const struct intel_gvt_gtt_gma_ops *gma_ops = gvt->gtt.gma_ops; in intel_vgpu_gma_to_gpa()
2195 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; in emulate_ggtt_mmio_read()
2232 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; in intel_vgpu_emulate_ggtt_mmio_read()
2246 const struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops; in ggtt_invalidate_pte()
2250 if (pfn != vgpu->gvt->gtt.scratch_mfn) in ggtt_invalidate_pte()
2257 struct intel_gvt *gvt = vgpu->gvt; in emulate_ggtt_mmio_write() local
2258 const struct intel_gvt_device_info *info = &gvt->device_info; in emulate_ggtt_mmio_write()
2260 const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; in emulate_ggtt_mmio_write()
2338 ops->set_pfn(&m, gvt->gtt.scratch_mfn); in emulate_ggtt_mmio_write()
2350 ops->set_pfn(&m, gvt->gtt.scratch_mfn); in emulate_ggtt_mmio_write()
2354 ops->set_pfn(&m, gvt->gtt.scratch_mfn); in emulate_ggtt_mmio_write()
2365 ggtt_invalidate(gvt->gt); in emulate_ggtt_mmio_write()
2384 const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; in intel_vgpu_emulate_ggtt_mmio_write()
2400 for_each_engine(engine, vgpu->gvt->gt, i) { in intel_vgpu_emulate_ggtt_mmio_write()
2413 struct drm_i915_private *i915 = vgpu->gvt->gt->i915; in alloc_scratch_pages()
2415 const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; in alloc_scratch_pages()
2417 vgpu->gvt->device_info.gtt_entry_size_shift; in alloc_scratch_pages()
2420 struct device *dev = vgpu->gvt->gt->i915->drm.dev; in alloc_scratch_pages()
2477 struct device *dev = vgpu->gvt->gt->i915->drm.dev; in release_scratch_page_tree()
2595 static void clean_spt_oos(struct intel_gvt *gvt) in clean_spt_oos() argument
2597 struct intel_gvt_gtt *gtt = &gvt->gtt; in clean_spt_oos()
2612 static int setup_spt_oos(struct intel_gvt *gvt) in setup_spt_oos() argument
2614 struct intel_gvt_gtt *gtt = &gvt->gtt; in setup_spt_oos()
2645 clean_spt_oos(gvt); in setup_spt_oos()
2745 int intel_gvt_init_gtt(struct intel_gvt *gvt) in intel_gvt_init_gtt() argument
2749 struct device *dev = gvt->gt->i915->drm.dev; in intel_gvt_init_gtt()
2754 gvt->gtt.pte_ops = &gen8_gtt_pte_ops; in intel_gvt_init_gtt()
2755 gvt->gtt.gma_ops = &gen8_gtt_gma_ops; in intel_gvt_init_gtt()
2771 gvt->gtt.scratch_page = virt_to_page(page); in intel_gvt_init_gtt()
2772 gvt->gtt.scratch_mfn = (unsigned long)(daddr >> I915_GTT_PAGE_SHIFT); in intel_gvt_init_gtt()
2775 ret = setup_spt_oos(gvt); in intel_gvt_init_gtt()
2779 __free_page(gvt->gtt.scratch_page); in intel_gvt_init_gtt()
2783 INIT_LIST_HEAD(&gvt->gtt.ppgtt_mm_lru_list_head); in intel_gvt_init_gtt()
2784 mutex_init(&gvt->gtt.ppgtt_mm_lock); in intel_gvt_init_gtt()
2796 void intel_gvt_clean_gtt(struct intel_gvt *gvt) in intel_gvt_clean_gtt() argument
2798 struct device *dev = gvt->gt->i915->drm.dev; in intel_gvt_clean_gtt()
2799 dma_addr_t daddr = (dma_addr_t)(gvt->gtt.scratch_mfn << in intel_gvt_clean_gtt()
2804 __free_page(gvt->gtt.scratch_page); in intel_gvt_clean_gtt()
2807 clean_spt_oos(gvt); in intel_gvt_clean_gtt()
2825 mutex_lock(&vgpu->gvt->gtt.ppgtt_mm_lock); in intel_vgpu_invalidate_ppgtt()
2827 mutex_unlock(&vgpu->gvt->gtt.ppgtt_mm_lock); in intel_vgpu_invalidate_ppgtt()
2845 struct intel_gvt *gvt = vgpu->gvt; in intel_vgpu_reset_ggtt() local
2846 const struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops; in intel_vgpu_reset_ggtt()
2852 pte_ops->set_pfn(&entry, gvt->gtt.scratch_mfn); in intel_vgpu_reset_ggtt()
2875 ggtt_invalidate(gvt->gt); in intel_vgpu_reset_ggtt()
2904 void intel_gvt_restore_ggtt(struct intel_gvt *gvt) in intel_gvt_restore_ggtt() argument
2913 idr_for_each_entry(&(gvt)->vgpu_idr, vgpu, id) { in intel_gvt_restore_ggtt()
2921 write_pte64(vgpu->gvt->gt->ggtt, offset + idx, pte); in intel_gvt_restore_ggtt()
2929 write_pte64(vgpu->gvt->gt->ggtt, offset + idx, pte); in intel_gvt_restore_ggtt()