Lines Matching refs:D_BXT
69 return D_BXT; in intel_gvt_get_device_type()
2748 MMIO_DH(BXT_P_CR_GT_DISP_PWRON, D_BXT, NULL, bxt_gt_disp_pwron_write); in init_bxt_mmio_info()
2749 MMIO_DH(BXT_PHY_CTL_FAMILY(DPIO_PHY0), D_BXT, in init_bxt_mmio_info()
2751 MMIO_DH(BXT_PHY_CTL_FAMILY(DPIO_PHY1), D_BXT, in init_bxt_mmio_info()
2753 MMIO_DH(BXT_PORT_PLL_ENABLE(PORT_A), D_BXT, in init_bxt_mmio_info()
2755 MMIO_DH(BXT_PORT_PLL_ENABLE(PORT_B), D_BXT, in init_bxt_mmio_info()
2757 MMIO_DH(BXT_PORT_PLL_ENABLE(PORT_C), D_BXT, NULL, in init_bxt_mmio_info()
2760 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2762 MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2764 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1), D_BXT, in init_bxt_mmio_info()
2766 MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH1), D_BXT, in init_bxt_mmio_info()
2768 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY1, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2770 MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY1, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2772 MMIO_DH(BXT_DE_PLL_ENABLE, D_BXT, NULL, bxt_de_pll_enable_write); in init_bxt_mmio_info()
2773 MMIO_DFH(GEN8_L3SQCREG1, D_BXT, F_CMD_ACCESS, NULL, NULL); in init_bxt_mmio_info()
2774 MMIO_DFH(GEN8_L3CNTLREG, D_BXT, F_CMD_ACCESS, NULL, NULL); in init_bxt_mmio_info()
2775 MMIO_DFH(_MMIO(0x20D8), D_BXT, F_CMD_ACCESS, NULL, NULL); in init_bxt_mmio_info()
2777 0, 0, D_BXT, NULL, NULL); in init_bxt_mmio_info()
2779 0, 0, D_BXT, NULL, NULL); in init_bxt_mmio_info()
2781 0, 0, D_BXT, NULL, NULL); in init_bxt_mmio_info()
2783 0, 0, D_BXT, NULL, NULL); in init_bxt_mmio_info()
2785 MMIO_DFH(GEN9_CTX_PREEMPT_REG, D_BXT, F_CMD_ACCESS, NULL, NULL); in init_bxt_mmio_info()
2787 MMIO_DH(GEN8_PRIVATE_PAT_LO, D_BXT, NULL, bxt_ppat_low_write); in init_bxt_mmio_info()