Lines Matching refs:dev_priv
410 #define INTEL_INFO(dev_priv) (&(dev_priv)->__info) argument
411 #define RUNTIME_INFO(dev_priv) (&(dev_priv)->__runtime) argument
412 #define DRIVER_CAPS(dev_priv) (&(dev_priv)->caps) argument
414 #define INTEL_DEVID(dev_priv) (RUNTIME_INFO(dev_priv)->device_id) argument
434 #define INTEL_REVID(dev_priv) (to_pci_dev((dev_priv)->drm.dev)->revision) argument
519 #define IS_MOBILE(dev_priv) (INTEL_INFO(dev_priv)->is_mobile) argument
520 #define IS_DGFX(dev_priv) (INTEL_INFO(dev_priv)->is_dgfx) argument
522 #define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830) argument
523 #define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G) argument
524 #define IS_I85X(dev_priv) IS_PLATFORM(dev_priv, INTEL_I85X) argument
525 #define IS_I865G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I865G) argument
526 #define IS_I915G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I915G) argument
527 #define IS_I915GM(dev_priv) IS_PLATFORM(dev_priv, INTEL_I915GM) argument
528 #define IS_I945G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I945G) argument
529 #define IS_I945GM(dev_priv) IS_PLATFORM(dev_priv, INTEL_I945GM) argument
530 #define IS_I965G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I965G) argument
531 #define IS_I965GM(dev_priv) IS_PLATFORM(dev_priv, INTEL_I965GM) argument
532 #define IS_G45(dev_priv) IS_PLATFORM(dev_priv, INTEL_G45) argument
533 #define IS_GM45(dev_priv) IS_PLATFORM(dev_priv, INTEL_GM45) argument
534 #define IS_G4X(dev_priv) (IS_G45(dev_priv) || IS_GM45(dev_priv)) argument
535 #define IS_PINEVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_PINEVIEW) argument
536 #define IS_G33(dev_priv) IS_PLATFORM(dev_priv, INTEL_G33) argument
537 #define IS_IRONLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IRONLAKE) argument
538 #define IS_IRONLAKE_M(dev_priv) \ argument
539 (IS_PLATFORM(dev_priv, INTEL_IRONLAKE) && IS_MOBILE(dev_priv))
540 #define IS_SANDYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_SANDYBRIDGE) argument
541 #define IS_IVYBRIDGE(dev_priv) IS_PLATFORM(dev_priv, INTEL_IVYBRIDGE) argument
542 #define IS_IVB_GT1(dev_priv) (IS_IVYBRIDGE(dev_priv) && \ argument
543 INTEL_INFO(dev_priv)->gt == 1)
544 #define IS_VALLEYVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_VALLEYVIEW) argument
545 #define IS_CHERRYVIEW(dev_priv) IS_PLATFORM(dev_priv, INTEL_CHERRYVIEW) argument
546 #define IS_HASWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_HASWELL) argument
547 #define IS_BROADWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_BROADWELL) argument
548 #define IS_SKYLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_SKYLAKE) argument
549 #define IS_BROXTON(dev_priv) IS_PLATFORM(dev_priv, INTEL_BROXTON) argument
550 #define IS_KABYLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_KABYLAKE) argument
551 #define IS_GEMINILAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_GEMINILAKE) argument
552 #define IS_COFFEELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_COFFEELAKE) argument
553 #define IS_COMETLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_COMETLAKE) argument
554 #define IS_ICELAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ICELAKE) argument
555 #define IS_JSL_EHL(dev_priv) (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) || \ argument
556 IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE))
557 #define IS_TIGERLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_TIGERLAKE) argument
558 #define IS_ROCKETLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE) argument
559 #define IS_DG1(dev_priv) IS_PLATFORM(dev_priv, INTEL_DG1) argument
560 #define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S) argument
561 #define IS_ALDERLAKE_P(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_P) argument
562 #define IS_XEHPSDV(dev_priv) IS_PLATFORM(dev_priv, INTEL_XEHPSDV) argument
563 #define IS_DG2(dev_priv) IS_PLATFORM(dev_priv, INTEL_DG2) argument
564 #define IS_PONTEVECCHIO(dev_priv) IS_PLATFORM(dev_priv, INTEL_PONTEVECCHIO) argument
565 #define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE) argument
567 #define IS_METEORLAKE_M(dev_priv) \ argument
568 IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_M)
569 #define IS_METEORLAKE_P(dev_priv) \ argument
570 IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_P)
571 #define IS_DG2_G10(dev_priv) \ argument
572 IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G10)
573 #define IS_DG2_G11(dev_priv) \ argument
574 IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G11)
575 #define IS_DG2_G12(dev_priv) \ argument
576 IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G12)
577 #define IS_ADLS_RPLS(dev_priv) \ argument
578 IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL)
579 #define IS_ADLP_N(dev_priv) \ argument
580 IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
581 #define IS_ADLP_RPLP(dev_priv) \ argument
582 IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
583 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \ argument
584 (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
585 #define IS_BDW_ULT(dev_priv) \ argument
586 IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULT)
587 #define IS_BDW_ULX(dev_priv) \ argument
588 IS_SUBPLATFORM(dev_priv, INTEL_BROADWELL, INTEL_SUBPLATFORM_ULX)
589 #define IS_BDW_GT3(dev_priv) (IS_BROADWELL(dev_priv) && \ argument
590 INTEL_INFO(dev_priv)->gt == 3)
591 #define IS_HSW_ULT(dev_priv) \ argument
592 IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, INTEL_SUBPLATFORM_ULT)
593 #define IS_HSW_GT3(dev_priv) (IS_HASWELL(dev_priv) && \ argument
594 INTEL_INFO(dev_priv)->gt == 3)
595 #define IS_HSW_GT1(dev_priv) (IS_HASWELL(dev_priv) && \ argument
596 INTEL_INFO(dev_priv)->gt == 1)
598 #define IS_HSW_ULX(dev_priv) \ argument
599 IS_SUBPLATFORM(dev_priv, INTEL_HASWELL, INTEL_SUBPLATFORM_ULX)
600 #define IS_SKL_ULT(dev_priv) \ argument
601 IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULT)
602 #define IS_SKL_ULX(dev_priv) \ argument
603 IS_SUBPLATFORM(dev_priv, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULX)
604 #define IS_KBL_ULT(dev_priv) \ argument
605 IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULT)
606 #define IS_KBL_ULX(dev_priv) \ argument
607 IS_SUBPLATFORM(dev_priv, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULX)
608 #define IS_SKL_GT2(dev_priv) (IS_SKYLAKE(dev_priv) && \ argument
609 INTEL_INFO(dev_priv)->gt == 2)
610 #define IS_SKL_GT3(dev_priv) (IS_SKYLAKE(dev_priv) && \ argument
611 INTEL_INFO(dev_priv)->gt == 3)
612 #define IS_SKL_GT4(dev_priv) (IS_SKYLAKE(dev_priv) && \ argument
613 INTEL_INFO(dev_priv)->gt == 4)
614 #define IS_KBL_GT2(dev_priv) (IS_KABYLAKE(dev_priv) && \ argument
615 INTEL_INFO(dev_priv)->gt == 2)
616 #define IS_KBL_GT3(dev_priv) (IS_KABYLAKE(dev_priv) && \ argument
617 INTEL_INFO(dev_priv)->gt == 3)
618 #define IS_CFL_ULT(dev_priv) \ argument
619 IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE, INTEL_SUBPLATFORM_ULT)
620 #define IS_CFL_ULX(dev_priv) \ argument
621 IS_SUBPLATFORM(dev_priv, INTEL_COFFEELAKE, INTEL_SUBPLATFORM_ULX)
622 #define IS_CFL_GT2(dev_priv) (IS_COFFEELAKE(dev_priv) && \ argument
623 INTEL_INFO(dev_priv)->gt == 2)
624 #define IS_CFL_GT3(dev_priv) (IS_COFFEELAKE(dev_priv) && \ argument
625 INTEL_INFO(dev_priv)->gt == 3)
627 #define IS_CML_ULT(dev_priv) \ argument
628 IS_SUBPLATFORM(dev_priv, INTEL_COMETLAKE, INTEL_SUBPLATFORM_ULT)
629 #define IS_CML_ULX(dev_priv) \ argument
630 IS_SUBPLATFORM(dev_priv, INTEL_COMETLAKE, INTEL_SUBPLATFORM_ULX)
631 #define IS_CML_GT2(dev_priv) (IS_COMETLAKE(dev_priv) && \ argument
632 INTEL_INFO(dev_priv)->gt == 2)
634 #define IS_ICL_WITH_PORT_F(dev_priv) \ argument
635 IS_SUBPLATFORM(dev_priv, INTEL_ICELAKE, INTEL_SUBPLATFORM_PORTF)
637 #define IS_TGL_UY(dev_priv) \ argument
638 IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_UY)
642 #define IS_KBL_GRAPHICS_STEP(dev_priv, since, until) \ argument
643 (IS_KABYLAKE(dev_priv) && IS_GRAPHICS_STEP(dev_priv, since, until))
644 #define IS_KBL_DISPLAY_STEP(dev_priv, since, until) \ argument
645 (IS_KABYLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, since, until))
734 #define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp) argument
735 #define IS_GEN9_LP(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && IS_LP(dev_priv)) argument
736 #define IS_GEN9_BC(dev_priv) (GRAPHICS_VER(dev_priv) == 9 && !IS_LP(dev_priv)) argument
761 #define HAS_MEDIA_RATIO_MODE(dev_priv) (INTEL_INFO(dev_priv)->has_media_ratio_mode) argument
767 #define CMDPARSER_USES_GGTT(dev_priv) (GRAPHICS_VER(dev_priv) == 7) argument
769 #define HAS_LLC(dev_priv) (INTEL_INFO(dev_priv)->has_llc) argument
770 #define HAS_4TILE(dev_priv) (INTEL_INFO(dev_priv)->has_4tile) argument
771 #define HAS_SNOOP(dev_priv) (INTEL_INFO(dev_priv)->has_snoop) argument
772 #define HAS_EDRAM(dev_priv) ((dev_priv)->edram_size_mb) argument
773 #define HAS_SECURE_BATCHES(dev_priv) (GRAPHICS_VER(dev_priv) < 6) argument
774 #define HAS_WT(dev_priv) HAS_EDRAM(dev_priv) argument
776 #define HWS_NEEDS_PHYSICAL(dev_priv) (INTEL_INFO(dev_priv)->hws_needs_physical) argument
778 #define HAS_LOGICAL_RING_CONTEXTS(dev_priv) \ argument
779 (INTEL_INFO(dev_priv)->has_logical_ring_contexts)
780 #define HAS_LOGICAL_RING_ELSQ(dev_priv) \ argument
781 (INTEL_INFO(dev_priv)->has_logical_ring_elsq)
783 #define HAS_EXECLISTS(dev_priv) HAS_LOGICAL_RING_CONTEXTS(dev_priv) argument
785 #define INTEL_PPGTT(dev_priv) (RUNTIME_INFO(dev_priv)->ppgtt_type) argument
786 #define HAS_PPGTT(dev_priv) \ argument
787 (INTEL_PPGTT(dev_priv) != INTEL_PPGTT_NONE)
788 #define HAS_FULL_PPGTT(dev_priv) \ argument
789 (INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL)
791 #define HAS_PAGE_SIZES(dev_priv, sizes) ({ \ argument
793 ((sizes) & ~RUNTIME_INFO(dev_priv)->page_sizes) == 0; \
796 #define HAS_OVERLAY(dev_priv) (INTEL_INFO(dev_priv)->display.has_overlay) argument
797 #define OVERLAY_NEEDS_PHYSICAL(dev_priv) \ argument
798 (INTEL_INFO(dev_priv)->display.overlay_needs_physical)
801 #define HAS_BROKEN_CS_TLB(dev_priv) (IS_I830(dev_priv) || IS_I845G(dev_priv)) argument
803 #define NEEDS_RC6_CTX_CORRUPTION_WA(dev_priv) \ argument
804 (IS_BROADWELL(dev_priv) || GRAPHICS_VER(dev_priv) == 9)
807 #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \ argument
808 (IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv))
810 #define HAS_GMBUS_IRQ(dev_priv) (DISPLAY_VER(dev_priv) >= 4) argument
811 #define HAS_GMBUS_BURST_READ(dev_priv) (DISPLAY_VER(dev_priv) >= 11 || \ argument
812 IS_GEMINILAKE(dev_priv) || \
813 IS_KABYLAKE(dev_priv))
818 #define HAS_128_BYTE_Y_TILING(dev_priv) (GRAPHICS_VER(dev_priv) != 2 && \ argument
819 !(IS_I915G(dev_priv) || IS_I915GM(dev_priv)))
820 #define SUPPORTS_TV(dev_priv) (INTEL_INFO(dev_priv)->display.supports_tv) argument
821 #define I915_HAS_HOTPLUG(dev_priv) (INTEL_INFO(dev_priv)->display.has_hotplug) argument
823 #define HAS_FW_BLC(dev_priv) (DISPLAY_VER(dev_priv) > 2) argument
824 #define HAS_FBC(dev_priv) (RUNTIME_INFO(dev_priv)->fbc_mask != 0) argument
825 #define HAS_CUR_FBC(dev_priv) (!HAS_GMCH(dev_priv) && DISPLAY_VER(dev_priv) >= 7) argument
827 #define HAS_IPS(dev_priv) (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv)) argument
829 #define HAS_DP_MST(dev_priv) (INTEL_INFO(dev_priv)->display.has_dp_mst) argument
830 #define HAS_DP20(dev_priv) (IS_DG2(dev_priv) || DISPLAY_VER(dev_priv) >= 14) argument
832 #define HAS_DOUBLE_BUFFERED_M_N(dev_priv) (DISPLAY_VER(dev_priv) >= 9 || IS_BROADWELL(dev_priv)) argument
834 #define HAS_CDCLK_CRAWL(dev_priv) (INTEL_INFO(dev_priv)->display.has_cdclk_crawl) argument
835 #define HAS_CDCLK_SQUASH(dev_priv) (INTEL_INFO(dev_priv)->display.has_cdclk_squash) argument
836 #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi) argument
837 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg) argument
838 #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr) argument
839 #define HAS_PSR_HW_TRACKING(dev_priv) \ argument
840 (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
841 #define HAS_PSR2_SEL_FETCH(dev_priv) (DISPLAY_VER(dev_priv) >= 12) argument
842 #define HAS_TRANSCODER(dev_priv, trans) ((RUNTIME_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)… argument
844 #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6) argument
845 #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p) argument
846 #define HAS_RC6pp(dev_priv) (false) /* HW was never validated */ argument
848 #define HAS_RPS(dev_priv) (INTEL_INFO(dev_priv)->has_rps) argument
850 #define HAS_DMC(dev_priv) (RUNTIME_INFO(dev_priv)->has_dmc) argument
851 #define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb) argument
855 #define HAS_HECI_PXP(dev_priv) \ argument
856 (INTEL_INFO(dev_priv)->has_heci_pxp)
858 #define HAS_HECI_GSCFI(dev_priv) \ argument
859 (INTEL_INFO(dev_priv)->has_heci_gscfi)
861 #define HAS_HECI_GSC(dev_priv) (HAS_HECI_PXP(dev_priv) || HAS_HECI_GSCFI(dev_priv)) argument
865 #define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm) argument
866 #define HAS_64BIT_RELOC(dev_priv) (INTEL_INFO(dev_priv)->has_64bit_reloc) argument
868 #define HAS_OA_BPC_REPORTING(dev_priv) \ argument
869 (INTEL_INFO(dev_priv)->has_oa_bpc_reporting)
870 #define HAS_OA_SLICE_CONTRIB_LIMITS(dev_priv) \ argument
871 (INTEL_INFO(dev_priv)->has_oa_slice_contrib_limits)
877 #define HAS_64K_PAGES(dev_priv) (INTEL_INFO(dev_priv)->has_64k_pages) argument
879 #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc) argument
884 #define HAS_EXTRA_GT_LIST(dev_priv) (INTEL_INFO(dev_priv)->extra_gt_list) argument
890 #define HAS_FLAT_CCS(dev_priv) (INTEL_INFO(dev_priv)->has_flat_ccs) argument
892 #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc) argument
894 #define HAS_POOLED_EU(dev_priv) (RUNTIME_INFO(dev_priv)->has_pooled_eu) argument
896 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv) (INTEL_INFO(dev_priv)->has_global_mocs) argument
898 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch) argument
902 #define HAS_LSPCON(dev_priv) (IS_DISPLAY_VER(dev_priv, 9, 10)) argument
907 #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf) argument
908 #define NUM_L3_SLICES(dev_priv) (IS_HSW_GT3(dev_priv) ? \ argument
909 2 : HAS_L3_DPF(dev_priv))
911 #define INTEL_NUM_PIPES(dev_priv) (hweight8(RUNTIME_INFO(dev_priv)->pipe_mask)) argument
913 #define HAS_DISPLAY(dev_priv) (RUNTIME_INFO(dev_priv)->pipe_mask != 0) argument
920 #define INTEL_DISPLAY_ENABLED(dev_priv) \ argument
921 (drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), \
922 !(dev_priv)->params.disable_display && \
923 !intel_opregion_headless_sku(dev_priv))
925 #define HAS_GUC_DEPRIVILEGE(dev_priv) \ argument
926 (INTEL_INFO(dev_priv)->has_guc_deprivilege)
928 #define HAS_D12_PLANE_MINIMIZATION(dev_priv) (IS_ROCKETLAKE(dev_priv) || \ argument
929 IS_ALDERLAKE_S(dev_priv))
942 mkwrite_device_info(struct drm_i915_private *dev_priv) in mkwrite_device_info() argument
944 return (struct intel_device_info *)INTEL_INFO(dev_priv); in mkwrite_device_info()