Lines Matching refs:dsc
212 struct drm_dsc_config *dsc; member
538 if (dpu_enc->dsc) in dpu_encoder_use_dsc_merge()
583 if (dpu_enc->dsc) { in dpu_encoder_get_topology()
1068 if (dpu_enc->dsc) { in dpu_encoder_virt_atomic_mode_set()
1792 dpu_encoder_dsc_initial_line_calc(struct drm_dsc_config *dsc, in dpu_encoder_dsc_initial_line_calc() argument
1797 soft_slice_per_enc = enc_ip_width / dsc->slice_width; in dpu_encoder_dsc_initial_line_calc()
1809 ssm_delay = ((dsc->bits_per_component < 10) ? 84 : 92); in dpu_encoder_dsc_initial_line_calc()
1810 total_pixels = ssm_delay * 3 + dsc->initial_xmit_delay + 47; in dpu_encoder_dsc_initial_line_calc()
1813 return DIV_ROUND_UP(total_pixels, dsc->slice_width); in dpu_encoder_dsc_initial_line_calc()
1818 struct drm_dsc_config *dsc, in dpu_encoder_dsc_pipe_cfg() argument
1823 hw_dsc->ops.dsc_config(hw_dsc, dsc, common_mode, initial_lines); in dpu_encoder_dsc_pipe_cfg()
1826 hw_dsc->ops.dsc_config_thresh(hw_dsc, dsc); in dpu_encoder_dsc_pipe_cfg()
1839 struct drm_dsc_config *dsc) in dpu_encoder_prep_dsc() argument
1863 pic_width = dsc->pic_width; in dpu_encoder_prep_dsc()
1869 this_frame_slices = pic_width / dsc->slice_width; in dpu_encoder_prep_dsc()
1870 intf_ip_w = this_frame_slices * dsc->slice_width; in dpu_encoder_prep_dsc()
1877 initial_lines = dpu_encoder_dsc_initial_line_calc(dsc, enc_ip_w); in dpu_encoder_prep_dsc()
1880 dpu_encoder_dsc_pipe_cfg(hw_dsc[i], hw_pp[i], dsc, dsc_common_mode, initial_lines); in dpu_encoder_prep_dsc()
1915 if (dpu_enc->dsc) in dpu_encoder_prepare_for_kickoff()
1916 dpu_encoder_prep_dsc(dpu_enc, dpu_enc->dsc); in dpu_encoder_prepare_for_kickoff()
2278 dpu_enc->dsc = disp_info->dsc; in dpu_encoder_setup_display()