Lines Matching refs:gpu
48 int (*get_param)(struct msm_gpu *gpu, struct msm_file_private *ctx,
50 int (*set_param)(struct msm_gpu *gpu, struct msm_file_private *ctx,
52 int (*hw_init)(struct msm_gpu *gpu);
53 int (*pm_suspend)(struct msm_gpu *gpu);
54 int (*pm_resume)(struct msm_gpu *gpu);
55 void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit);
56 void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
58 struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
59 void (*recover)(struct msm_gpu *gpu);
60 void (*destroy)(struct msm_gpu *gpu);
63 void (*show)(struct msm_gpu *gpu, struct msm_gpu_state *state,
66 void (*debugfs_init)(struct msm_gpu *gpu, struct drm_minor *minor);
69 u64 (*gpu_busy)(struct msm_gpu *gpu, unsigned long *out_sample_rate);
70 struct msm_gpu_state *(*gpu_state_get)(struct msm_gpu *gpu);
72 unsigned long (*gpu_get_freq)(struct msm_gpu *gpu);
74 void (*gpu_set_freq)(struct msm_gpu *gpu, struct dev_pm_opp *opp,
77 (struct msm_gpu *gpu, struct platform_device *pdev);
79 (struct msm_gpu *gpu);
80 uint32_t (*get_rptr)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
89 bool (*progress)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
307 static inline bool msm_gpu_active(struct msm_gpu *gpu) in msm_gpu_active() argument
311 for (i = 0; i < gpu->nr_rings; i++) { in msm_gpu_active()
312 struct msm_ringbuffer *ring = gpu->rb[i]; in msm_gpu_active()
447 static inline int msm_gpu_convert_priority(struct msm_gpu *gpu, int prio, in msm_gpu_convert_priority() argument
459 if (rn >= gpu->nr_rings) in msm_gpu_convert_priority()
545 static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data) in gpu_write() argument
547 msm_writel(data, gpu->mmio + (reg << 2)); in gpu_write()
550 static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg) in gpu_read() argument
552 return msm_readl(gpu->mmio + (reg << 2)); in gpu_read()
555 static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or) in gpu_rmw() argument
557 msm_rmw(gpu->mmio + (reg << 2), mask, or); in gpu_rmw()
560 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 reg) in gpu_read64() argument
578 val = (u64) msm_readl(gpu->mmio + (reg << 2)); in gpu_read64()
579 val |= ((u64) msm_readl(gpu->mmio + ((reg + 1) << 2)) << 32); in gpu_read64()
584 static inline void gpu_write64(struct msm_gpu *gpu, u32 reg, u64 val) in gpu_write64() argument
587 msm_writel(lower_32_bits(val), gpu->mmio + (reg << 2)); in gpu_write64()
588 msm_writel(upper_32_bits(val), gpu->mmio + ((reg + 1) << 2)); in gpu_write64()
591 int msm_gpu_pm_suspend(struct msm_gpu *gpu);
592 int msm_gpu_pm_resume(struct msm_gpu *gpu);
594 void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_file_private *ctx,
611 struct msm_gpu *gpu, int sysprof);
626 void msm_devfreq_init(struct msm_gpu *gpu);
627 void msm_devfreq_cleanup(struct msm_gpu *gpu);
628 void msm_devfreq_resume(struct msm_gpu *gpu);
629 void msm_devfreq_suspend(struct msm_gpu *gpu);
630 void msm_devfreq_boost(struct msm_gpu *gpu, unsigned factor);
631 void msm_devfreq_active(struct msm_gpu *gpu);
632 void msm_devfreq_idle(struct msm_gpu *gpu);
634 int msm_gpu_hw_init(struct msm_gpu *gpu);
636 void msm_gpu_perfcntr_start(struct msm_gpu *gpu);
637 void msm_gpu_perfcntr_stop(struct msm_gpu *gpu);
638 int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime,
641 void msm_gpu_retire(struct msm_gpu *gpu);
642 void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit);
645 struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,
649 msm_gpu_create_private_address_space(struct msm_gpu *gpu, struct task_struct *task);
651 void msm_gpu_cleanup(struct msm_gpu *gpu);
663 static inline struct msm_gpu_state *msm_gpu_crashstate_get(struct msm_gpu *gpu) in msm_gpu_crashstate_get() argument
667 mutex_lock(&gpu->lock); in msm_gpu_crashstate_get()
669 if (gpu->crashstate) { in msm_gpu_crashstate_get()
670 kref_get(&gpu->crashstate->ref); in msm_gpu_crashstate_get()
671 state = gpu->crashstate; in msm_gpu_crashstate_get()
674 mutex_unlock(&gpu->lock); in msm_gpu_crashstate_get()
679 static inline void msm_gpu_crashstate_put(struct msm_gpu *gpu) in msm_gpu_crashstate_put() argument
681 mutex_lock(&gpu->lock); in msm_gpu_crashstate_put()
683 if (gpu->crashstate) { in msm_gpu_crashstate_put()
684 if (gpu->funcs->gpu_state_put(gpu->crashstate)) in msm_gpu_crashstate_put()
685 gpu->crashstate = NULL; in msm_gpu_crashstate_put()
688 mutex_unlock(&gpu->lock); in msm_gpu_crashstate_put()
695 #define check_apriv(gpu, flags) \ argument
696 (((gpu)->hw_apriv ? MSM_BO_MAP_PRIV : 0) | (flags))