Lines Matching refs:lt
56 nvkm_dp_train_sense(struct lt_state *lt, bool pc, u32 delay) in nvkm_dp_train_sense() argument
58 struct nvkm_outp *outp = lt->outp; in nvkm_dp_train_sense()
64 if (lt->repeater) in nvkm_dp_train_sense()
65 addr = DPCD_LTTPR_LANE0_1_STATUS(lt->repeater); in nvkm_dp_train_sense()
69 ret = nvkm_rdaux(outp->dp.aux, addr, <->stat[0], 3); in nvkm_dp_train_sense()
73 if (lt->repeater) in nvkm_dp_train_sense()
74 addr = DPCD_LTTPR_LANE0_1_ADJUST(lt->repeater); in nvkm_dp_train_sense()
78 ret = nvkm_rdaux(outp->dp.aux, addr, <->stat[4], 2); in nvkm_dp_train_sense()
83 ret = nvkm_rdaux(outp->dp.aux, DPCD_LS0C, <->pc2stat, 1); in nvkm_dp_train_sense()
85 lt->pc2stat = 0x00; in nvkm_dp_train_sense()
87 OUTP_TRACE(outp, "status %6ph pc2 %02x", lt->stat, lt->pc2stat); in nvkm_dp_train_sense()
89 OUTP_TRACE(outp, "status %6ph", lt->stat); in nvkm_dp_train_sense()
96 nvkm_dp_train_drive(struct lt_state *lt, bool pc) in nvkm_dp_train_drive() argument
98 struct nvkm_outp *outp = lt->outp; in nvkm_dp_train_drive()
109 u8 lane = (lt->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_drive()
110 u8 lpc2 = (lt->pc2stat >> (i * 2)) & 0x3; in nvkm_dp_train_drive()
127 lt->conf[i] = (lpre << 3) | lvsw; in nvkm_dp_train_drive()
128 lt->pc2conf[i >> 1] |= lpc2 << ((i & 1) * 4); in nvkm_dp_train_drive()
130 OUTP_TRACE(outp, "config lane %d %02x %02x", i, lt->conf[i], lpc2); in nvkm_dp_train_drive()
132 if (lt->repeater != lt->repeaters) in nvkm_dp_train_drive()
148 if (lt->repeater) in nvkm_dp_train_drive()
149 addr = DPCD_LTTPR_LANE0_SET(lt->repeater); in nvkm_dp_train_drive()
153 ret = nvkm_wraux(outp->dp.aux, addr, lt->conf, 4); in nvkm_dp_train_drive()
158 ret = nvkm_wraux(outp->dp.aux, DPCD_LC0F, lt->pc2conf, 2); in nvkm_dp_train_drive()
167 nvkm_dp_train_pattern(struct lt_state *lt, u8 pattern) in nvkm_dp_train_pattern() argument
169 struct nvkm_outp *outp = lt->outp; in nvkm_dp_train_pattern()
176 if (lt->repeater) in nvkm_dp_train_pattern()
177 addr = DPCD_LTTPR_PATTERN_SET(lt->repeater); in nvkm_dp_train_pattern()
193 nvkm_dp_train_eq(struct lt_state *lt) in nvkm_dp_train_eq() argument
195 struct nvkm_i2c_aux *aux = lt->outp->dp.aux; in nvkm_dp_train_eq()
200 if (lt->repeater) { in nvkm_dp_train_eq()
201 if (!nvkm_rdaux(aux, DPCD_LTTPR_AUX_RD_INTERVAL(lt->repeater), &data, sizeof(data))) in nvkm_dp_train_eq()
204 nvkm_dp_train_pattern(lt, 4); in nvkm_dp_train_eq()
206 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] >= 0x14 && in nvkm_dp_train_eq()
207 lt->outp->dp.dpcd[DPCD_RC03] & DPCD_RC03_TPS4_SUPPORTED) in nvkm_dp_train_eq()
208 nvkm_dp_train_pattern(lt, 4); in nvkm_dp_train_eq()
210 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] >= 0x12 && in nvkm_dp_train_eq()
211 lt->outp->dp.dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED) in nvkm_dp_train_eq()
212 nvkm_dp_train_pattern(lt, 3); in nvkm_dp_train_eq()
214 nvkm_dp_train_pattern(lt, 2); in nvkm_dp_train_eq()
216 usec = (lt->outp->dp.dpcd[DPCD_RC0E] & DPCD_RC0E_AUX_RD_INTERVAL) * 4000; in nvkm_dp_train_eq()
221 nvkm_dp_train_drive(lt, lt->pc2)) || in nvkm_dp_train_eq()
222 nvkm_dp_train_sense(lt, lt->pc2, usec ? usec : 400)) in nvkm_dp_train_eq()
225 eq_done = !!(lt->stat[2] & DPCD_LS04_INTERLANE_ALIGN_DONE); in nvkm_dp_train_eq()
226 for (i = 0; i < lt->outp->ior->dp.nr && eq_done; i++) { in nvkm_dp_train_eq()
227 u8 lane = (lt->stat[i >> 1] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_eq()
240 nvkm_dp_train_cr(struct lt_state *lt) in nvkm_dp_train_cr() argument
243 int voltage = lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET; in nvkm_dp_train_cr()
246 nvkm_dp_train_pattern(lt, 1); in nvkm_dp_train_cr()
248 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] < 0x14 && !lt->repeater) in nvkm_dp_train_cr()
249 usec = (lt->outp->dp.dpcd[DPCD_RC0E] & DPCD_RC0E_AUX_RD_INTERVAL) * 4000; in nvkm_dp_train_cr()
252 if (nvkm_dp_train_drive(lt, false) || in nvkm_dp_train_cr()
253 nvkm_dp_train_sense(lt, false, usec ? usec : 100)) in nvkm_dp_train_cr()
257 for (i = 0; i < lt->outp->ior->dp.nr; i++) { in nvkm_dp_train_cr()
258 u8 lane = (lt->stat[i >> 1] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_cr()
261 if (lt->conf[i] & DPCD_LC03_MAX_SWING_REACHED) in nvkm_dp_train_cr()
267 if ((lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET) != voltage) { in nvkm_dp_train_cr()
268 voltage = lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET; in nvkm_dp_train_cr()
280 struct lt_state lt = { in nvkm_dp_train_link() local
299 lt.repeaters = outp->dp.lttprs; in nvkm_dp_train_link()
327 for (lt.repeater = lt.repeaters; lt.repeater >= 0; lt.repeater--) { in nvkm_dp_train_link()
328 if (lt.repeater) in nvkm_dp_train_link()
329 OUTP_DBG(outp, "training LTTPR%d", lt.repeater); in nvkm_dp_train_link()
333 memset(lt.stat, 0x00, sizeof(lt.stat)); in nvkm_dp_train_link()
334 ret = nvkm_dp_train_cr(<); in nvkm_dp_train_link()
336 ret = nvkm_dp_train_eq(<); in nvkm_dp_train_link()
337 nvkm_dp_train_pattern(<, 0); in nvkm_dp_train_link()
455 if (atomic_read(&outp->dp.lt.done)) { in nvkm_dp_train()
473 ior->dp.mst = outp->dp.lt.mst; in nvkm_dp_train()
482 if (outp->dp.lt.nr) { in nvkm_dp_train()
484 for (rate = 0; nr == outp->dp.lt.nr && rate < outp->dp.rates; rate++) { in nvkm_dp_train()
485 if (outp->dp.rate[rate].rate / 27000 == outp->dp.lt.bw) { in nvkm_dp_train()
512 atomic_set(&outp->dp.lt.done, 1); in nvkm_dp_train()
531 atomic_set(&outp->dp.lt.done, 0); in nvkm_dp_release()
560 dataKBps, linkKBps, ior->dp.mst, outp->dp.lt.mst); in nvkm_dp_acquire()
561 if (linkKBps < dataKBps || ior->dp.mst != outp->dp.lt.mst) { in nvkm_dp_acquire()
589 if (retrain || !atomic_read(&outp->dp.lt.done)) in nvkm_dp_acquire()
727 atomic_set(&outp->dp.lt.done, 0); in nvkm_dp_enable()
805 atomic_set(&outp->dp.lt.done, 0); in nvkm_dp_new()