Lines Matching refs:engn
161 gf100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in gf100_ectx_bind() argument
166 switch (engn->engine->subdev.type) { in gf100_ectx_bind()
169 case NVKM_ENGINE_CE : ptr0 = 0x0230 + (engn->engine->subdev.inst * 0x10); break; in gf100_ectx_bind()
190 gf100_ectx_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx) in gf100_ectx_ctor() argument
202 gf100_engn_mmu_fault_triggered(struct nvkm_engn *engn) in gf100_engn_mmu_fault_triggered() argument
204 struct nvkm_runl *runl = engn->runl; in gf100_engn_mmu_fault_triggered()
207 u32 data = nvkm_rd32(device, 0x002a30 + (engn->id * 4)); in gf100_engn_mmu_fault_triggered()
209 ENGN_DEBUG(engn, "%08x: mmu fault triggered", data); in gf100_engn_mmu_fault_triggered()
214 nvkm_mask(device, 0x002a30 + (engn->id * 4), 0x00000100, 0x00000000); in gf100_engn_mmu_fault_triggered()
222 gf100_engn_mmu_fault_trigger(struct nvkm_engn *engn) in gf100_engn_mmu_fault_trigger() argument
224 struct nvkm_runl *runl = engn->runl; in gf100_engn_mmu_fault_trigger()
228 ENGN_DEBUG(engn, "triggering mmu fault on 0x%02x", engn->fault); in gf100_engn_mmu_fault_trigger()
233 nvkm_wr32(device, 0x002a30 + (engn->id * 4), 0x00000100 | engn->fault); in gf100_engn_mmu_fault_trigger()
247 gf100_engn_status(struct nvkm_engn *engn, struct gf100_engn_status *status) in gf100_engn_status() argument
249 u32 stat = nvkm_rd32(engn->engine->subdev.device, 0x002640 + (engn->id * 4)); in gf100_engn_status()
257 ENGN_DEBUG(engn, "%08x: busy %d save %d unk0 %d unk1 %d chid %d", in gf100_engn_status()
262 gf100_engn_cxid(struct nvkm_engn *engn, bool *cgid) in gf100_engn_cxid() argument
266 gf100_engn_status(engn, &status); in gf100_engn_cxid()
276 gf100_engn_chsw(struct nvkm_engn *engn) in gf100_engn_chsw() argument
280 gf100_engn_status(engn, &status); in gf100_engn_chsw()
541 struct nvkm_engn *engn; in gf100_fifo_mmu_fault_recover() local
548 engn = nvkm_runl_find_engn(engn, runl, engn->fault == info->engine); in gf100_fifo_mmu_fault_recover()
549 if (engn) { in gf100_fifo_mmu_fault_recover()
551 if (engn->func->mmu_fault_triggered && in gf100_fifo_mmu_fault_recover()
552 engn->func->mmu_fault_triggered(engn)) { in gf100_fifo_mmu_fault_recover()
553 nvkm_runl_rc_engn(runl, engn); in gf100_fifo_mmu_fault_recover()
557 engine = engn->engine; in gf100_fifo_mmu_fault_recover()
621 struct nvkm_engn *engn, *engn2; in gf100_fifo_intr_ctxsw_timeout() local
628 nvkm_runl_foreach_engn_cond(engn, runl, engm & BIT(engn->id)) { in gf100_fifo_intr_ctxsw_timeout()
630 id = engn->func->cxid(engn, &cgid); in gf100_fifo_intr_ctxsw_timeout()
648 struct nvkm_engn *engn; in gf100_fifo_intr_sched_ctxsw() local
653 nvkm_runl_foreach_engn_cond(engn, runl, engn->func->chsw) { in gf100_fifo_intr_sched_ctxsw()
654 if (WARN_ON(engn->fault < 0) || !engn->func->chsw(engn)) in gf100_fifo_intr_sched_ctxsw()
657 engm |= BIT(engn->id); in gf100_fifo_intr_sched_ctxsw()
769 gf100_fifo_intr_engine_unit(struct nvkm_fifo *fifo, int engn) in gf100_fifo_intr_engine_unit() argument
773 u32 intr = nvkm_rd32(device, 0x0025a8 + (engn * 0x04)); in gf100_fifo_intr_engine_unit()
777 nvkm_wr32(device, 0x0025a8 + (engn * 0x04), intr); in gf100_fifo_intr_engine_unit()
786 nvkm_error(subdev, "ENGINE %d %d %01x", engn, unkn, ints); in gf100_fifo_intr_engine_unit()
916 nvkm_runl_add(runl, 0, fifo->func->engn, NVKM_ENGINE_GR, 0); in gf100_fifo_runl_ctor()
917 nvkm_runl_add(runl, 1, fifo->func->engn, NVKM_ENGINE_MSPDEC, 0); in gf100_fifo_runl_ctor()
918 nvkm_runl_add(runl, 2, fifo->func->engn, NVKM_ENGINE_MSPPP, 0); in gf100_fifo_runl_ctor()
919 nvkm_runl_add(runl, 3, fifo->func->engn, NVKM_ENGINE_MSVLD, 0); in gf100_fifo_runl_ctor()
920 nvkm_runl_add(runl, 4, fifo->func->engn, NVKM_ENGINE_CE, 0); in gf100_fifo_runl_ctor()
921 nvkm_runl_add(runl, 5, fifo->func->engn, NVKM_ENGINE_CE, 1); in gf100_fifo_runl_ctor()
959 .engn = &gf100_engn,