Lines Matching refs:falcon
29 gm200_flcn_tracepc(struct nvkm_falcon *falcon) in gm200_flcn_tracepc() argument
31 u32 sctl = nvkm_falcon_rd32(falcon, 0x240); in gm200_flcn_tracepc()
32 u32 tidx = nvkm_falcon_rd32(falcon, 0x148); in gm200_flcn_tracepc()
35 FLCN_ERR(falcon, "TRACEPC SCTL %08x TIDX %08x", sctl, tidx); in gm200_flcn_tracepc()
37 nvkm_falcon_wr32(falcon, 0x148, sp); in gm200_flcn_tracepc()
38 ip = nvkm_falcon_rd32(falcon, 0x14c); in gm200_flcn_tracepc()
39 FLCN_ERR(falcon, "TRACEPC: %08x", ip); in gm200_flcn_tracepc()
44 gm200_flcn_pio_dmem_rd(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len) in gm200_flcn_pio_dmem_rd() argument
47 *(u32 *)img = nvkm_falcon_rd32(falcon, 0x1c4 + (port * 8)); in gm200_flcn_pio_dmem_rd()
54 u32 data = nvkm_falcon_rd32(falcon, 0x1c4 + (port * 8)); in gm200_flcn_pio_dmem_rd()
64 gm200_flcn_pio_dmem_rd_init(struct nvkm_falcon *falcon, u8 port, u32 dmem_base) in gm200_flcn_pio_dmem_rd_init() argument
66 nvkm_falcon_wr32(falcon, 0x1c0 + (port * 8), BIT(25) | dmem_base); in gm200_flcn_pio_dmem_rd_init()
70 gm200_flcn_pio_dmem_wr(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len, u16 tag) in gm200_flcn_pio_dmem_wr() argument
73 nvkm_falcon_wr32(falcon, 0x1c4 + (port * 8), *(u32 *)img); in gm200_flcn_pio_dmem_wr()
82 gm200_flcn_pio_dmem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 dmem_base) in gm200_flcn_pio_dmem_wr_init() argument
84 nvkm_falcon_wr32(falcon, 0x1c0 + (port * 8), BIT(24) | dmem_base); in gm200_flcn_pio_dmem_wr_init()
98 gm200_flcn_pio_imem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 imem_base) in gm200_flcn_pio_imem_wr_init() argument
100 nvkm_falcon_wr32(falcon, 0x180 + (port * 0x10), (sec ? BIT(28) : 0) | BIT(24) | imem_base); in gm200_flcn_pio_imem_wr_init()
104 gm200_flcn_pio_imem_wr(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len, u16 tag) in gm200_flcn_pio_imem_wr() argument
106 nvkm_falcon_wr32(falcon, 0x188 + (port * 0x10), tag++); in gm200_flcn_pio_imem_wr()
108 nvkm_falcon_wr32(falcon, 0x184 + (port * 0x10), *(u32 *)img); in gm200_flcn_pio_imem_wr()
123 gm200_flcn_bind_stat(struct nvkm_falcon *falcon, bool intr) in gm200_flcn_bind_stat() argument
125 if (intr && !(nvkm_falcon_rd32(falcon, 0x008) & 0x00000008)) in gm200_flcn_bind_stat()
128 return (nvkm_falcon_rd32(falcon, 0x0dc) & 0x00007000) >> 12; in gm200_flcn_bind_stat()
132 gm200_flcn_bind_inst(struct nvkm_falcon *falcon, int target, u64 addr) in gm200_flcn_bind_inst() argument
134 nvkm_falcon_mask(falcon, 0x604, 0x00000007, 0x00000000); /* DMAIDX_VIRT */ in gm200_flcn_bind_inst()
135 nvkm_falcon_wr32(falcon, 0x054, (1 << 30) | (target << 28) | (addr >> 12)); in gm200_flcn_bind_inst()
136 nvkm_falcon_mask(falcon, 0x090, 0x00010000, 0x00010000); in gm200_flcn_bind_inst()
137 nvkm_falcon_mask(falcon, 0x0a4, 0x00000008, 0x00000008); in gm200_flcn_bind_inst()
141 gm200_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *falcon) in gm200_flcn_reset_wait_mem_scrubbing() argument
143 nvkm_falcon_mask(falcon, 0x040, 0x00000000, 0x00000000); in gm200_flcn_reset_wait_mem_scrubbing()
145 if (nvkm_msec(falcon->owner->device, 10, in gm200_flcn_reset_wait_mem_scrubbing()
146 if (!(nvkm_falcon_rd32(falcon, 0x10c) & 0x00000006)) in gm200_flcn_reset_wait_mem_scrubbing()
155 gm200_flcn_enable(struct nvkm_falcon *falcon) in gm200_flcn_enable() argument
157 struct nvkm_device *device = falcon->owner->device; in gm200_flcn_enable()
160 if (falcon->func->reset_eng) { in gm200_flcn_enable()
161 ret = falcon->func->reset_eng(falcon); in gm200_flcn_enable()
166 if (falcon->func->select) { in gm200_flcn_enable()
167 ret = falcon->func->select(falcon); in gm200_flcn_enable()
172 if (falcon->func->reset_pmc) in gm200_flcn_enable()
173 nvkm_mc_enable(device, falcon->owner->type, falcon->owner->inst); in gm200_flcn_enable()
175 ret = falcon->func->reset_wait_mem_scrubbing(falcon); in gm200_flcn_enable()
179 nvkm_falcon_wr32(falcon, 0x084, nvkm_rd32(device, 0x000000)); in gm200_flcn_enable()
184 gm200_flcn_disable(struct nvkm_falcon *falcon) in gm200_flcn_disable() argument
186 struct nvkm_device *device = falcon->owner->device; in gm200_flcn_disable()
189 if (falcon->func->select) { in gm200_flcn_disable()
190 ret = falcon->func->select(falcon); in gm200_flcn_disable()
195 nvkm_falcon_mask(falcon, 0x048, 0x00000003, 0x00000000); in gm200_flcn_disable()
196 nvkm_falcon_wr32(falcon, 0x014, 0xffffffff); in gm200_flcn_disable()
198 if (falcon->func->reset_pmc) { in gm200_flcn_disable()
199 if (falcon->func->reset_prep) { in gm200_flcn_disable()
200 ret = falcon->func->reset_prep(falcon); in gm200_flcn_disable()
205 nvkm_mc_disable(device, falcon->owner->type, falcon->owner->inst); in gm200_flcn_disable()
208 if (falcon->func->reset_eng) { in gm200_flcn_disable()
209 ret = falcon->func->reset_eng(falcon); in gm200_flcn_disable()
220 struct nvkm_falcon *falcon = fw->falcon; in gm200_flcn_fw_boot() local
224 nvkm_falcon_wr32(falcon, 0x040, pmbox0 ? *pmbox0 : 0xcafebeef); in gm200_flcn_fw_boot()
226 nvkm_falcon_wr32(falcon, 0x044, *pmbox1); in gm200_flcn_fw_boot()
228 nvkm_falcon_wr32(falcon, 0x104, fw->boot_addr); in gm200_flcn_fw_boot()
229 nvkm_falcon_wr32(falcon, 0x100, 0x00000002); in gm200_flcn_fw_boot()
231 if (nvkm_msec(falcon->owner->device, 2000, in gm200_flcn_fw_boot()
232 if (nvkm_falcon_rd32(falcon, 0x100) & 0x00000010) in gm200_flcn_fw_boot()
237 mbox0 = nvkm_falcon_rd32(falcon, 0x040); in gm200_flcn_fw_boot()
238 mbox1 = nvkm_falcon_rd32(falcon, 0x044); in gm200_flcn_fw_boot()
239 if (FLCN_ERRON(falcon, ret || mbox0 != mbox0_ok, "mbox %08x %08x", mbox0, mbox1)) in gm200_flcn_fw_boot()
243 nvkm_falcon_mask(falcon, 0x004, 0xffffffff, irqsclr); in gm200_flcn_fw_boot()
251 struct nvkm_falcon *falcon = fw->falcon; in gm200_flcn_fw_load() local
255 nvkm_falcon_mask(falcon, 0x048, 0x00000001, 0x00000001); in gm200_flcn_fw_load()
266 falcon->func->bind_inst(falcon, target, nvkm_memory_addr(fw->inst)); in gm200_flcn_fw_load()
268 if (nvkm_msec(falcon->owner->device, 10, in gm200_flcn_fw_load()
269 if (falcon->func->bind_stat(falcon, falcon->func->bind_intr) == 5) in gm200_flcn_fw_load()
274 nvkm_falcon_mask(falcon, 0x004, 0x00000008, 0x00000008); in gm200_flcn_fw_load()
275 nvkm_falcon_mask(falcon, 0x058, 0x00000002, 0x00000002); in gm200_flcn_fw_load()
277 if (nvkm_msec(falcon->owner->device, 10, in gm200_flcn_fw_load()
278 if (falcon->func->bind_stat(falcon, false) == 0) in gm200_flcn_fw_load()
283 nvkm_falcon_mask(falcon, 0x624, 0x00000080, 0x00000080); in gm200_flcn_fw_load()
284 nvkm_falcon_wr32(falcon, 0x10c, 0x00000000); in gm200_flcn_fw_load()
297 ret = nvkm_falcon_pio_wr(falcon, fw->boot, 0, 0, in gm200_flcn_fw_load()
298 IMEM, falcon->code.limit - fw->boot_size, fw->boot_size, in gm200_flcn_fw_load()
306 ret = nvkm_falcon_pio_wr(falcon, fw->fw.img + fw->nmem_base_img, fw->nmem_base_img, 0, in gm200_flcn_fw_load()
311 ret = nvkm_falcon_pio_wr(falcon, fw->fw.img + fw->imem_base_img, fw->imem_base_img, 0, in gm200_flcn_fw_load()
316 ret = nvkm_falcon_pio_wr(falcon, fw->fw.img + fw->dmem_base_img, fw->dmem_base_img, 0, in gm200_flcn_fw_load()
327 return nvkm_falcon_reset(fw->falcon); in gm200_flcn_fw_reset()
333 struct nvkm_falcon *falcon = fw->falcon; in gm200_flcn_fw_signature() local
334 u32 addr = falcon->func->debug; in gm200_flcn_fw_signature()
338 ret = nvkm_falcon_enable(falcon); in gm200_flcn_fw_signature()
342 if (nvkm_falcon_rd32(falcon, addr) & 0x00100000) { in gm200_flcn_fw_signature()