Lines Matching refs:falcon
25 gp102_flcn_pio_emem_rd(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len) in gp102_flcn_pio_emem_rd() argument
28 *(u32 *)img = nvkm_falcon_rd32(falcon, 0xac4 + (port * 8)); in gp102_flcn_pio_emem_rd()
35 gp102_flcn_pio_emem_rd_init(struct nvkm_falcon *falcon, u8 port, u32 dmem_base) in gp102_flcn_pio_emem_rd_init() argument
37 nvkm_falcon_wr32(falcon, 0xac0 + (port * 8), BIT(25) | dmem_base); in gp102_flcn_pio_emem_rd_init()
41 gp102_flcn_pio_emem_wr(struct nvkm_falcon *falcon, u8 port, const u8 *img, int len, u16 tag) in gp102_flcn_pio_emem_wr() argument
44 nvkm_falcon_wr32(falcon, 0xac4 + (port * 8), *(u32 *)img); in gp102_flcn_pio_emem_wr()
51 gp102_flcn_pio_emem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 emem_base) in gp102_flcn_pio_emem_wr_init() argument
53 nvkm_falcon_wr32(falcon, 0xac0 + (port * 8), BIT(24) | emem_base); in gp102_flcn_pio_emem_wr_init()
67 gp102_flcn_reset_eng(struct nvkm_falcon *falcon) in gp102_flcn_reset_eng() argument
71 if (falcon->func->reset_prep) { in gp102_flcn_reset_eng()
72 ret = falcon->func->reset_prep(falcon); in gp102_flcn_reset_eng()
77 nvkm_falcon_mask(falcon, 0x3c0, 0x00000001, 0x00000001); in gp102_flcn_reset_eng()
79 nvkm_falcon_mask(falcon, 0x3c0, 0x00000001, 0x00000000); in gp102_flcn_reset_eng()
81 return falcon->func->reset_wait_mem_scrubbing(falcon); in gp102_flcn_reset_eng()