Lines Matching refs:pv
144 struct nvkm_pll_vals *pv) in setPLL_single() argument
150 uint32_t pll = (oldpll & 0xfff80000) | pv->log2P << 16 | pv->NM1; in setPLL_single()
164 if (oldM && pv->M1 && (oldN / oldM < pv->N1 / pv->M1)) in setPLL_single()
166 nvkm_wr32(device, reg, pv->log2P << 16 | (oldpll & 0xffff)); in setPLL_single()
169 nvkm_wr32(device, reg, (oldpll & 0xffff0000) | pv->NM1); in setPLL_single()
199 struct nvkm_pll_vals *pv) in setPLL_double_highregs() argument
207 uint32_t pll1 = (oldpll1 & 0xfff80000) | pv->log2P << 16 | pv->NM1; in setPLL_double_highregs()
208 uint32_t pll2 = (oldpll2 & 0x7fff0000) | 1 << 31 | pv->NM2; in setPLL_double_highregs()
210 bool single_stage = !pv->NM2 || pv->N2 == pv->M2; /* nv41+ only */ in setPLL_double_highregs()
216 pll1 = (pll1 & 0xfcc7ffff) | (pv->N2 & 0x18) << 21 | in setPLL_double_highregs()
217 (pv->N2 & 0x7) << 19 | 8 << 4 | (pv->M2 & 7) << 4; in setPLL_double_highregs()
277 struct nvkm_pll_vals *pv) in setPLL_double_lowregs() argument
290 uint32_t NMNM = pv->NM2 << 16 | pv->NM1; in setPLL_double_lowregs()
292 0xc << 28 | pv->log2P << 16; in setPLL_double_lowregs()
296 bool single_stage = !pv->NM2 || pv->N2 == pv->M2; in setPLL_double_lowregs()
313 Pval2 = pv->log2P + info.bias_p; in setPLL_double_lowregs()
360 struct nvkm_pll_vals pv; in nv04_devinit_pll_set() local
374 pv.refclk = info.refclk; in nv04_devinit_pll_set()
375 pv.N1 = N1; in nv04_devinit_pll_set()
376 pv.M1 = M1; in nv04_devinit_pll_set()
377 pv.N2 = N2; in nv04_devinit_pll_set()
378 pv.M2 = M2; in nv04_devinit_pll_set()
379 pv.log2P = P; in nv04_devinit_pll_set()
384 setPLL_double_highregs(devinit, type, &pv); in nv04_devinit_pll_set()
386 setPLL_double_lowregs(devinit, type, &pv); in nv04_devinit_pll_set()
388 setPLL_single(devinit, type, &pv); in nv04_devinit_pll_set()