Lines Matching refs:fb_swap
1147 u32 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_NONE); in dce4_crtc_do_set_base() local
1195 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16); in dce4_crtc_do_set_base()
1203 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16); in dce4_crtc_do_set_base()
1211 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16); in dce4_crtc_do_set_base()
1218 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16); in dce4_crtc_do_set_base()
1226 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32); in dce4_crtc_do_set_base()
1234 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32); in dce4_crtc_do_set_base()
1244 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32); in dce4_crtc_do_set_base()
1253 fb_swap = (EVERGREEN_GRPH_RED_CROSSBAR(EVERGREEN_GRPH_RED_SEL_B) | in dce4_crtc_do_set_base()
1256 fb_swap |= EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32); in dce4_crtc_do_set_base()
1394 WREG32(EVERGREEN_GRPH_SWAP_CONTROL + radeon_crtc->crtc_offset, fb_swap); in dce4_crtc_do_set_base()
1467 u32 fb_swap = R600_D1GRPH_SWAP_ENDIAN_NONE; in avivo_crtc_do_set_base() local
1516 fb_swap = R600_D1GRPH_SWAP_ENDIAN_16BIT; in avivo_crtc_do_set_base()
1524 fb_swap = R600_D1GRPH_SWAP_ENDIAN_16BIT; in avivo_crtc_do_set_base()
1532 fb_swap = R600_D1GRPH_SWAP_ENDIAN_16BIT; in avivo_crtc_do_set_base()
1541 fb_swap = R600_D1GRPH_SWAP_ENDIAN_32BIT; in avivo_crtc_do_set_base()
1550 fb_swap = R600_D1GRPH_SWAP_ENDIAN_32BIT; in avivo_crtc_do_set_base()
1561 fb_swap = in avivo_crtc_do_set_base()
1567 fb_swap |= R600_D1GRPH_SWAP_ENDIAN_32BIT; in avivo_crtc_do_set_base()
1614 WREG32(R600_D1GRPH_SWAP_CONTROL + radeon_crtc->crtc_offset, fb_swap); in avivo_crtc_do_set_base()