Lines Matching refs:ib
133 struct radeon_ib *ib) in cik_sdma_ring_ib_execute() argument
135 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cik_sdma_ring_ib_execute()
136 u32 extra_bits = (ib->vm ? ib->vm->ids[ib->ring].id : 0) & 0xf; in cik_sdma_ring_ib_execute()
154 radeon_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_ib_execute()
155 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); in cik_sdma_ring_ib_execute()
156 radeon_ring_write(ring, ib->length_dw); in cik_sdma_ring_ib_execute()
703 struct radeon_ib ib; in cik_sdma_ib_test() local
720 r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); in cik_sdma_ib_test()
726 ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); in cik_sdma_ib_test()
727 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ib_test()
728 ib.ptr[2] = upper_32_bits(gpu_addr); in cik_sdma_ib_test()
729 ib.ptr[3] = 1; in cik_sdma_ib_test()
730 ib.ptr[4] = 0xDEADBEEF; in cik_sdma_ib_test()
731 ib.length_dw = 5; in cik_sdma_ib_test()
733 r = radeon_ib_schedule(rdev, &ib, NULL, false); in cik_sdma_ib_test()
735 radeon_ib_free(rdev, &ib); in cik_sdma_ib_test()
739 r = radeon_fence_wait_timeout(ib.fence, false, usecs_to_jiffies( in cik_sdma_ib_test()
756 DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i); in cik_sdma_ib_test()
761 radeon_ib_free(rdev, &ib); in cik_sdma_ib_test()
803 struct radeon_ib *ib, in cik_sdma_vm_copy_pages() argument
812 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, in cik_sdma_vm_copy_pages()
814 ib->ptr[ib->length_dw++] = bytes; in cik_sdma_vm_copy_pages()
815 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_vm_copy_pages()
816 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cik_sdma_vm_copy_pages()
817 ib->ptr[ib->length_dw++] = upper_32_bits(src); in cik_sdma_vm_copy_pages()
818 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_copy_pages()
819 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_copy_pages()
841 struct radeon_ib *ib, in cik_sdma_vm_write_pages() argument
855 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_vm_write_pages()
857 ib->ptr[ib->length_dw++] = pe; in cik_sdma_vm_write_pages()
858 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_write_pages()
859 ib->ptr[ib->length_dw++] = ndw; in cik_sdma_vm_write_pages()
870 ib->ptr[ib->length_dw++] = value; in cik_sdma_vm_write_pages()
871 ib->ptr[ib->length_dw++] = upper_32_bits(value); in cik_sdma_vm_write_pages()
890 struct radeon_ib *ib, in cik_sdma_vm_set_pages() argument
909 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0); in cik_sdma_vm_set_pages()
910 ib->ptr[ib->length_dw++] = pe; /* dst addr */ in cik_sdma_vm_set_pages()
911 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_set_pages()
912 ib->ptr[ib->length_dw++] = flags; /* mask */ in cik_sdma_vm_set_pages()
913 ib->ptr[ib->length_dw++] = 0; in cik_sdma_vm_set_pages()
914 ib->ptr[ib->length_dw++] = value; /* value */ in cik_sdma_vm_set_pages()
915 ib->ptr[ib->length_dw++] = upper_32_bits(value); in cik_sdma_vm_set_pages()
916 ib->ptr[ib->length_dw++] = incr; /* increment size */ in cik_sdma_vm_set_pages()
917 ib->ptr[ib->length_dw++] = 0; in cik_sdma_vm_set_pages()
918 ib->ptr[ib->length_dw++] = ndw; /* number of entries */ in cik_sdma_vm_set_pages()
932 void cik_sdma_vm_pad_ib(struct radeon_ib *ib) in cik_sdma_vm_pad_ib() argument
934 while (ib->length_dw & 0x7) in cik_sdma_vm_pad_ib()
935 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_NOP, 0, 0); in cik_sdma_vm_pad_ib()