Lines Matching refs:eg_pi
121 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_gfx_clock_gating_enable() local
124 if (eg_pi->light_sleep) { in cypress_gfx_clock_gating_enable()
149 if (eg_pi->light_sleep) { in cypress_gfx_clock_gating_enable()
174 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_mg_clock_gating_enable() local
196 if (eg_pi->mcls) { in cypress_mg_clock_gating_enable()
303 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_pcie_performance_request() local
315 eg_pi->pcie_performance_request_registered = true; in cypress_pcie_performance_request()
318 eg_pi->pcie_performance_request_registered) { in cypress_pcie_performance_request()
319 eg_pi->pcie_performance_request_registered = false; in cypress_pcie_performance_request()
655 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_populate_mvdd_value() local
658 voltage->index = eg_pi->mvdd_high_index; in cypress_populate_mvdd_value()
664 voltage->index = eg_pi->mvdd_low_index; in cypress_populate_mvdd_value()
667 voltage->index = eg_pi->mvdd_high_index; in cypress_populate_mvdd_value()
680 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_convert_power_level_to_smc() local
697 !eg_pi->uvd_enabled) { in cypress_convert_power_level_to_smc()
699 if (eg_pi->sclk_deep_sleep) in cypress_convert_power_level_to_smc()
709 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in cypress_convert_power_level_to_smc()
721 dll_state_on = eg_pi->dll_default_on; in cypress_convert_power_level_to_smc()
741 &eg_pi->vddc_voltage_table, in cypress_convert_power_level_to_smc()
747 if (eg_pi->vddci_control) { in cypress_convert_power_level_to_smc()
749 &eg_pi->vddci_voltage_table, in cypress_convert_power_level_to_smc()
766 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_convert_power_state_to_smc() local
797 if (eg_pi->dynamic_ac_timing) { in cypress_convert_power_state_to_smc()
830 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_convert_mc_reg_table_entry_to_smc() local
833 for (i = 0; i < eg_pi->mc_reg_table.num_entries; i++) { in cypress_convert_mc_reg_table_entry_to_smc()
835 eg_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max) in cypress_convert_mc_reg_table_entry_to_smc()
839 if ((i == eg_pi->mc_reg_table.num_entries) && (i > 0)) in cypress_convert_mc_reg_table_entry_to_smc()
842 cypress_convert_mc_registers(&eg_pi->mc_reg_table.mc_reg_table_entry[i], in cypress_convert_mc_reg_table_entry_to_smc()
844 eg_pi->mc_reg_table.last, in cypress_convert_mc_reg_table_entry_to_smc()
845 eg_pi->mc_reg_table.valid_flag); in cypress_convert_mc_reg_table_entry_to_smc()
887 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_upload_mc_reg_table() local
893 address = eg_pi->mc_reg_table_start + in cypress_upload_mc_reg_table()
949 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_populate_mc_reg_addresses() local
952 for (i = 0, j = 0; j < eg_pi->mc_reg_table.last; j++) { in cypress_populate_mc_reg_addresses()
953 if (eg_pi->mc_reg_table.valid_flag & (1 << j)) { in cypress_populate_mc_reg_addresses()
955 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s0); in cypress_populate_mc_reg_addresses()
957 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s1); in cypress_populate_mc_reg_addresses()
967 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_set_mc_reg_address_table() local
970 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RAS_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
971 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_RAS_TIMING >> 2; in cypress_set_mc_reg_address_table()
974 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_CAS_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
975 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_CAS_TIMING >> 2; in cypress_set_mc_reg_address_table()
978 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
979 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC_TIMING >> 2; in cypress_set_mc_reg_address_table()
982 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING2_LP >> 2; in cypress_set_mc_reg_address_table()
983 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC_TIMING2 >> 2; in cypress_set_mc_reg_address_table()
986 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RD_CTL_D0_LP >> 2; in cypress_set_mc_reg_address_table()
987 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_RD_CTL_D0 >> 2; in cypress_set_mc_reg_address_table()
990 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RD_CTL_D1_LP >> 2; in cypress_set_mc_reg_address_table()
991 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_RD_CTL_D1 >> 2; in cypress_set_mc_reg_address_table()
994 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D0_LP >> 2; in cypress_set_mc_reg_address_table()
995 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_WR_CTL_D0 >> 2; in cypress_set_mc_reg_address_table()
998 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_WR_CTL_D1_LP >> 2; in cypress_set_mc_reg_address_table()
999 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_WR_CTL_D1 >> 2; in cypress_set_mc_reg_address_table()
1002 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in cypress_set_mc_reg_address_table()
1003 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_EMRS >> 2; in cypress_set_mc_reg_address_table()
1006 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in cypress_set_mc_reg_address_table()
1007 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_MRS >> 2; in cypress_set_mc_reg_address_table()
1010 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2; in cypress_set_mc_reg_address_table()
1011 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_MRS1 >> 2; in cypress_set_mc_reg_address_table()
1014 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC1 >> 2; in cypress_set_mc_reg_address_table()
1015 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC1 >> 2; in cypress_set_mc_reg_address_table()
1018 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RESERVE_M >> 2; in cypress_set_mc_reg_address_table()
1019 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_RESERVE_M >> 2; in cypress_set_mc_reg_address_table()
1022 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC3 >> 2; in cypress_set_mc_reg_address_table()
1023 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC3 >> 2; in cypress_set_mc_reg_address_table()
1026 eg_pi->mc_reg_table.last = (u8)i; in cypress_set_mc_reg_address_table()
1032 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_retrieve_ac_timing_for_one_entry() local
1035 for (i = 0; i < eg_pi->mc_reg_table.last; i++) in cypress_retrieve_ac_timing_for_one_entry()
1037 RREG32(eg_pi->mc_reg_table.mc_reg_address[i].s1 << 2); in cypress_retrieve_ac_timing_for_one_entry()
1044 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_retrieve_ac_timing_for_all_ranges() local
1048 eg_pi->mc_reg_table.mc_reg_table_entry[i].mclk_max = in cypress_retrieve_ac_timing_for_all_ranges()
1052 &eg_pi->mc_reg_table.mc_reg_table_entry[i]); in cypress_retrieve_ac_timing_for_all_ranges()
1055 eg_pi->mc_reg_table.num_entries = range_table->num_entries; in cypress_retrieve_ac_timing_for_all_ranges()
1056 eg_pi->mc_reg_table.valid_flag = 0; in cypress_retrieve_ac_timing_for_all_ranges()
1058 for (i = 0; i < eg_pi->mc_reg_table.last; i++) { in cypress_retrieve_ac_timing_for_all_ranges()
1060 if (eg_pi->mc_reg_table.mc_reg_table_entry[j-1].mc_data[i] != in cypress_retrieve_ac_timing_for_all_ranges()
1061 eg_pi->mc_reg_table.mc_reg_table_entry[j].mc_data[i]) { in cypress_retrieve_ac_timing_for_all_ranges()
1062 eg_pi->mc_reg_table.valid_flag |= (1 << i); in cypress_retrieve_ac_timing_for_all_ranges()
1166 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_copy_ac_timing_from_s1_to_s0() local
1170 for (i = 0; i < eg_pi->mc_reg_table.last; i++) { in cypress_copy_ac_timing_from_s1_to_s0()
1171 value = RREG32(eg_pi->mc_reg_table.mc_reg_address[i].s1 << 2); in cypress_copy_ac_timing_from_s1_to_s0()
1172 WREG32(eg_pi->mc_reg_table.mc_reg_address[i].s0 << 2, value); in cypress_copy_ac_timing_from_s1_to_s0()
1225 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_populate_initial_mvdd_value() local
1227 voltage->index = eg_pi->mvdd_high_index; in cypress_populate_initial_mvdd_value()
1239 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_populate_smc_initial_state() local
1282 &eg_pi->vddc_voltage_table, in cypress_populate_smc_initial_state()
1286 if (eg_pi->vddci_control) in cypress_populate_smc_initial_state()
1288 &eg_pi->vddci_voltage_table, in cypress_populate_smc_initial_state()
1333 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_populate_smc_acpi_state() local
1359 &eg_pi->vddc_voltage_table, in cypress_populate_smc_acpi_state()
1375 &eg_pi->vddc_voltage_table, in cypress_populate_smc_acpi_state()
1381 if (eg_pi->acpi_vddci) { in cypress_populate_smc_acpi_state()
1382 if (eg_pi->vddci_control) { in cypress_populate_smc_acpi_state()
1384 &eg_pi->vddci_voltage_table, in cypress_populate_smc_acpi_state()
1385 eg_pi->acpi_vddci, in cypress_populate_smc_acpi_state()
1457 if (eg_pi->dynamic_ac_timing) in cypress_populate_smc_acpi_state()
1484 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_construct_voltage_tables() local
1488 &eg_pi->vddc_voltage_table); in cypress_construct_voltage_tables()
1492 if (eg_pi->vddc_voltage_table.count > MAX_NO_VREG_STEPS) in cypress_construct_voltage_tables()
1494 &eg_pi->vddc_voltage_table); in cypress_construct_voltage_tables()
1496 if (eg_pi->vddci_control) { in cypress_construct_voltage_tables()
1498 &eg_pi->vddci_voltage_table); in cypress_construct_voltage_tables()
1502 if (eg_pi->vddci_voltage_table.count > MAX_NO_VREG_STEPS) in cypress_construct_voltage_tables()
1504 &eg_pi->vddci_voltage_table); in cypress_construct_voltage_tables()
1526 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_populate_smc_voltage_tables() local
1529 if (eg_pi->vddc_voltage_table.count) { in cypress_populate_smc_voltage_tables()
1531 &eg_pi->vddc_voltage_table, in cypress_populate_smc_voltage_tables()
1536 cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); in cypress_populate_smc_voltage_tables()
1538 for (i = 0; i < eg_pi->vddc_voltage_table.count; i++) { in cypress_populate_smc_voltage_tables()
1540 eg_pi->vddc_voltage_table.entries[i].value) { in cypress_populate_smc_voltage_tables()
1547 if (eg_pi->vddci_voltage_table.count) { in cypress_populate_smc_voltage_tables()
1549 &eg_pi->vddci_voltage_table, in cypress_populate_smc_voltage_tables()
1554 cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); in cypress_populate_smc_voltage_tables()
1572 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_get_mvdd_configuration() local
1578 eg_pi->mvdd_high_index = 0; in cypress_get_mvdd_configuration()
1579 eg_pi->mvdd_low_index = 1; in cypress_get_mvdd_configuration()
1585 eg_pi->mvdd_high_index = 1; in cypress_get_mvdd_configuration()
1587 eg_pi->mvdd_high_index = 0; in cypress_get_mvdd_configuration()
1589 eg_pi->mvdd_low_index = in cypress_get_mvdd_configuration()
1590 (eg_pi->mvdd_high_index == 0) ? 1 : 0; in cypress_get_mvdd_configuration()
1666 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_populate_mc_reg_table() local
1679 cypress_convert_mc_registers(&eg_pi->mc_reg_table.mc_reg_table_entry[0], in cypress_populate_mc_reg_table()
1680 &mc_reg_table.data[1], eg_pi->mc_reg_table.last, in cypress_populate_mc_reg_table()
1681 eg_pi->mc_reg_table.valid_flag); in cypress_populate_mc_reg_table()
1685 return rv770_copy_bytes_to_smc(rdev, eg_pi->mc_reg_table_start, in cypress_populate_mc_reg_table()
1693 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_get_table_locations() local
1722 eg_pi->mc_reg_table_start = (u16)tmp; in cypress_get_table_locations()
1784 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_dpm_setup_asic() local
1791 if (eg_pi->pcie_performance_request) in cypress_dpm_setup_asic()
1792 eg_pi->pcie_performance_request_registered = false; in cypress_dpm_setup_asic()
1794 if (eg_pi->pcie_performance_request) in cypress_dpm_setup_asic()
1805 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_dpm_enable() local
1832 if (eg_pi->dynamic_ac_timing) { in cypress_dpm_enable()
1837 eg_pi->dynamic_ac_timing = false; in cypress_dpm_enable()
1878 if (eg_pi->dynamic_ac_timing) { in cypress_dpm_enable()
1897 if (eg_pi->memory_transition) in cypress_dpm_enable()
1916 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_dpm_disable() local
1947 if (eg_pi->dynamic_ac_timing) in cypress_dpm_disable()
1955 struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); in cypress_dpm_set_power_state() local
1965 if (eg_pi->pcie_performance_request) in cypress_dpm_set_power_state()
1979 if (eg_pi->dynamic_ac_timing) { in cypress_dpm_set_power_state()
2001 if (eg_pi->pcie_performance_request) in cypress_dpm_set_power_state()
2023 struct evergreen_power_info *eg_pi; in cypress_dpm_init() local
2027 eg_pi = kzalloc(sizeof(struct evergreen_power_info), GFP_KERNEL); in cypress_dpm_init()
2028 if (eg_pi == NULL) in cypress_dpm_init()
2030 rdev->pm.dpm.priv = eg_pi; in cypress_dpm_init()
2031 pi = &eg_pi->rv7xx; in cypress_dpm_init()
2035 eg_pi->ulv.supported = false; in cypress_dpm_init()
2037 eg_pi->acpi_vddci = 0; in cypress_dpm_init()
2063 eg_pi->mclk_edc_wr_enable_threshold = 40000; in cypress_dpm_init()
2076 eg_pi->vddci_control = in cypress_dpm_init()
2095 eg_pi->ls_clock_gating = false; in cypress_dpm_init()
2096 eg_pi->sclk_deep_sleep = false; in cypress_dpm_init()
2114 eg_pi->dynamic_ac_timing = true; in cypress_dpm_init()
2115 eg_pi->abm = true; in cypress_dpm_init()
2116 eg_pi->mcls = true; in cypress_dpm_init()
2117 eg_pi->light_sleep = true; in cypress_dpm_init()
2118 eg_pi->memory_transition = true; in cypress_dpm_init()
2120 eg_pi->pcie_performance_request = in cypress_dpm_init()
2123 eg_pi->pcie_performance_request = false; in cypress_dpm_init()
2129 eg_pi->dll_default_on = true; in cypress_dpm_init()
2131 eg_pi->dll_default_on = false; in cypress_dpm_init()
2133 eg_pi->sclk_deep_sleep = false; in cypress_dpm_init()