Lines Matching refs:dyn_state
802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()
804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()
873 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in ni_apply_state_adjust_rules()
876 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in ni_apply_state_adjust_rules()
879 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in ni_apply_state_adjust_rules()
882 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in ni_apply_state_adjust_rules()
896 if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) in ni_apply_state_adjust_rules()
899 if (ps->performance_levels[i].vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2) in ni_apply_state_adjust_rules()
1012 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk); in ni_patch_dependency_tables_based_on_leakage()
1015 &rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk); in ni_patch_dependency_tables_based_on_leakage()
1346 if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries && in ni_get_std_voltage_value()
1347 ((u32)voltage->index < rdev->pm.dpm.dyn_state.cac_leakage_table.count)) in ni_get_std_voltage_value()
1348 *std_voltage = rdev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc; in ni_get_std_voltage_value()
3097 &rdev->pm.dpm.dyn_state.cac_leakage_table; in ni_init_simplified_leakage_table()
3977 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; in ni_parse_pplib_clock_info()
3978 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; in ni_parse_pplib_clock_info()
3979 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; in ni_parse_pplib_clock_info()
3980 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; in ni_parse_pplib_clock_info()
4079 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in ni_dpm_init()
4083 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in ni_dpm_init()
4087 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in ni_dpm_init()
4088 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in ni_dpm_init()
4089 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in ni_dpm_init()
4090 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; in ni_dpm_init()
4091 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; in ni_dpm_init()
4092 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000; in ni_dpm_init()
4093 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; in ni_dpm_init()
4094 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000; in ni_dpm_init()
4095 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900; in ni_dpm_init()
4196 rdev->pm.dpm.dyn_state.mclk_sclk_ratio = 3; in ni_dpm_init()
4197 rdev->pm.dpm.dyn_state.vddc_vddci_delta = 200; in ni_dpm_init()
4198 rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2 = 900; in ni_dpm_init()
4199 rdev->pm.dpm.dyn_state.valid_sclk_values.count = ARRAY_SIZE(btc_valid_sclk); in ni_dpm_init()
4200 rdev->pm.dpm.dyn_state.valid_sclk_values.values = btc_valid_sclk; in ni_dpm_init()
4201 rdev->pm.dpm.dyn_state.valid_mclk_values.count = 0; in ni_dpm_init()
4202 rdev->pm.dpm.dyn_state.valid_mclk_values.values = NULL; in ni_dpm_init()
4203 rdev->pm.dpm.dyn_state.sclk_mclk_delta = 12500; in ni_dpm_init()
4260 if ((rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) || in ni_dpm_init()
4261 (rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0)) in ni_dpm_init()
4262 rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc = in ni_dpm_init()
4263 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_dpm_init()
4277 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries); in ni_dpm_fini()