Lines Matching refs:gb_tile_config
247 unsigned gb_tile_config; in r300_ring_start() local
251 gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16); in r300_ring_start()
254 gb_tile_config |= R300_PIPE_COUNT_R300; in r300_ring_start()
257 gb_tile_config |= R300_PIPE_COUNT_R420_3P; in r300_ring_start()
260 gb_tile_config |= R300_PIPE_COUNT_R420; in r300_ring_start()
264 gb_tile_config |= R300_PIPE_COUNT_RV350; in r300_ring_start()
279 radeon_ring_write(ring, gb_tile_config); in r300_ring_start()
363 uint32_t gb_tile_config, tmp; in r300_gpu_init() local
374 gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16); in r300_gpu_init()
377 gb_tile_config |= R300_PIPE_COUNT_R300; in r300_gpu_init()
380 gb_tile_config |= R300_PIPE_COUNT_R420_3P; in r300_gpu_init()
383 gb_tile_config |= R300_PIPE_COUNT_R420; in r300_gpu_init()
387 gb_tile_config |= R300_PIPE_COUNT_RV350; in r300_gpu_init()
390 WREG32(R300_GB_TILE_CONFIG, gb_tile_config); in r300_gpu_init()