Lines Matching refs:dst_offset
2383 u64 src_offset, dst_offset; in r600_dma_cs_parse() local
2406 dst_offset = radeon_get_ib_value(p, idx+1); in r600_dma_cs_parse()
2407 dst_offset <<= 8; in r600_dma_cs_parse()
2412 dst_offset = radeon_get_ib_value(p, idx+1); in r600_dma_cs_parse()
2413 dst_offset |= ((u64)(radeon_get_ib_value(p, idx+2) & 0xff)) << 32; in r600_dma_cs_parse()
2419 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in r600_dma_cs_parse()
2421 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in r600_dma_cs_parse()
2445 dst_offset = radeon_get_ib_value(p, idx+5); in r600_dma_cs_parse()
2446 dst_offset |= ((u64)(radeon_get_ib_value(p, idx+6) & 0xff)) << 32; in r600_dma_cs_parse()
2456 dst_offset = radeon_get_ib_value(p, idx+1); in r600_dma_cs_parse()
2457 dst_offset <<= 8; in r600_dma_cs_parse()
2465 dst_offset = radeon_get_ib_value(p, idx+1); in r600_dma_cs_parse()
2466 dst_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0xff)) << 32; in r600_dma_cs_parse()
2476 dst_offset = radeon_get_ib_value(p, idx+1); in r600_dma_cs_parse()
2477 dst_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0xff0000)) << 16; in r600_dma_cs_parse()
2491 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in r600_dma_cs_parse()
2493 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in r600_dma_cs_parse()
2507 dst_offset = radeon_get_ib_value(p, idx+1); in r600_dma_cs_parse()
2508 dst_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0x00ff0000)) << 16; in r600_dma_cs_parse()
2509 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { in r600_dma_cs_parse()
2511 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); in r600_dma_cs_parse()