Lines Matching refs:p1pll
109 struct radeon_pll *p1pll = &rdev->clock.p1pll; in radeon_read_clocks_OF() local
121 p1pll->reference_freq = p2pll->reference_freq = (*val) / 10; in radeon_read_clocks_OF()
122 p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; in radeon_read_clocks_OF()
123 if (p1pll->reference_div < 2) in radeon_read_clocks_OF()
124 p1pll->reference_div = 12; in radeon_read_clocks_OF()
125 p2pll->reference_div = p1pll->reference_div; in radeon_read_clocks_OF()
129 p1pll->pll_in_min = 100; in radeon_read_clocks_OF()
130 p1pll->pll_in_max = 1350; in radeon_read_clocks_OF()
131 p1pll->pll_out_min = 20000; in radeon_read_clocks_OF()
132 p1pll->pll_out_max = 50000; in radeon_read_clocks_OF()
138 p1pll->pll_in_min = 40; in radeon_read_clocks_OF()
139 p1pll->pll_in_max = 500; in radeon_read_clocks_OF()
140 p1pll->pll_out_min = 12500; in radeon_read_clocks_OF()
141 p1pll->pll_out_max = 35000; in radeon_read_clocks_OF()
150 spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; in radeon_read_clocks_OF()
183 struct radeon_pll *p1pll = &rdev->clock.p1pll; in radeon_get_clock_info() local
198 if (p1pll->reference_div < 2) { in radeon_get_clock_info()
202 p1pll->reference_div = in radeon_get_clock_info()
205 p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK; in radeon_get_clock_info()
206 if (p1pll->reference_div < 2) in radeon_get_clock_info()
207 p1pll->reference_div = 12; in radeon_get_clock_info()
209 p1pll->reference_div = 12; in radeon_get_clock_info()
231 p1pll->reference_freq = 1432; in radeon_get_clock_info()
236 p1pll->reference_freq = 2700; in radeon_get_clock_info()
241 p1pll->reference_div = in radeon_get_clock_info()
243 if (p1pll->reference_div < 2) in radeon_get_clock_info()
244 p1pll->reference_div = 12; in radeon_get_clock_info()
245 p2pll->reference_div = p1pll->reference_div; in radeon_get_clock_info()
248 p1pll->pll_in_min = 100; in radeon_get_clock_info()
249 p1pll->pll_in_max = 1350; in radeon_get_clock_info()
250 p1pll->pll_out_min = 20000; in radeon_get_clock_info()
251 p1pll->pll_out_max = 50000; in radeon_get_clock_info()
257 p1pll->pll_in_min = 40; in radeon_get_clock_info()
258 p1pll->pll_in_max = 500; in radeon_get_clock_info()
259 p1pll->pll_out_min = 12500; in radeon_get_clock_info()
260 p1pll->pll_out_max = 35000; in radeon_get_clock_info()
280 p1pll->min_post_div = 2; in radeon_get_clock_info()
281 p1pll->max_post_div = 0x7f; in radeon_get_clock_info()
282 p1pll->min_frac_feedback_div = 0; in radeon_get_clock_info()
283 p1pll->max_frac_feedback_div = 9; in radeon_get_clock_info()
289 p1pll->min_post_div = 1; in radeon_get_clock_info()
290 p1pll->max_post_div = 16; in radeon_get_clock_info()
291 p1pll->min_frac_feedback_div = 0; in radeon_get_clock_info()
292 p1pll->max_frac_feedback_div = 0; in radeon_get_clock_info()
310 p1pll->min_ref_div = 2; in radeon_get_clock_info()
311 p1pll->max_ref_div = 0x3ff; in radeon_get_clock_info()
312 p1pll->min_feedback_div = 4; in radeon_get_clock_info()
313 p1pll->max_feedback_div = 0x7ff; in radeon_get_clock_info()
314 p1pll->best_vco = 0; in radeon_get_clock_info()