Lines Matching refs:radeon_crtc
52 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in avivo_crtc_load_lut() local
58 DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); in avivo_crtc_load_lut()
59 WREG32(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
61 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
62 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
63 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
65 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
66 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
67 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
69 WREG32(AVIVO_DC_LUT_RW_SELECT, radeon_crtc->crtc_id); in avivo_crtc_load_lut()
85 WREG32_P(AVIVO_D1GRPH_LUT_SEL + radeon_crtc->crtc_offset, radeon_crtc->crtc_id, ~1); in avivo_crtc_load_lut()
90 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in dce4_crtc_load_lut() local
96 DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); in dce4_crtc_load_lut()
97 WREG32(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0); in dce4_crtc_load_lut()
99 WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); in dce4_crtc_load_lut()
100 WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0); in dce4_crtc_load_lut()
101 WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0); in dce4_crtc_load_lut()
103 WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff); in dce4_crtc_load_lut()
104 WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff); in dce4_crtc_load_lut()
105 WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff); in dce4_crtc_load_lut()
107 WREG32(EVERGREEN_DC_LUT_RW_MODE + radeon_crtc->crtc_offset, 0); in dce4_crtc_load_lut()
108 WREG32(EVERGREEN_DC_LUT_WRITE_EN_MASK + radeon_crtc->crtc_offset, 0x00000007); in dce4_crtc_load_lut()
110 WREG32(EVERGREEN_DC_LUT_RW_INDEX + radeon_crtc->crtc_offset, 0); in dce4_crtc_load_lut()
115 WREG32(EVERGREEN_DC_LUT_30_COLOR + radeon_crtc->crtc_offset, in dce4_crtc_load_lut()
124 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in dce5_crtc_load_lut() local
130 DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); in dce5_crtc_load_lut()
134 WREG32(NI_INPUT_CSC_CONTROL + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
137 WREG32(NI_PRESCALE_GRPH_CONTROL + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
139 WREG32(NI_PRESCALE_OVL_CONTROL + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
141 WREG32(NI_INPUT_GAMMA_CONTROL + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
145 WREG32(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0); in dce5_crtc_load_lut()
147 WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); in dce5_crtc_load_lut()
148 WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0); in dce5_crtc_load_lut()
149 WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0); in dce5_crtc_load_lut()
151 WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff); in dce5_crtc_load_lut()
152 WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff); in dce5_crtc_load_lut()
153 WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff); in dce5_crtc_load_lut()
155 WREG32(EVERGREEN_DC_LUT_RW_MODE + radeon_crtc->crtc_offset, 0); in dce5_crtc_load_lut()
156 WREG32(EVERGREEN_DC_LUT_WRITE_EN_MASK + radeon_crtc->crtc_offset, 0x00000007); in dce5_crtc_load_lut()
158 WREG32(EVERGREEN_DC_LUT_RW_INDEX + radeon_crtc->crtc_offset, 0); in dce5_crtc_load_lut()
163 WREG32(EVERGREEN_DC_LUT_30_COLOR + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
169 WREG32(NI_DEGAMMA_CONTROL + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
174 WREG32(NI_GAMUT_REMAP_CONTROL + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
177 WREG32(NI_REGAMMA_CONTROL + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
180 WREG32(NI_OUTPUT_CSC_CONTROL + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
181 (NI_OUTPUT_CSC_GRPH_MODE(radeon_crtc->output_csc) | in dce5_crtc_load_lut()
184 WREG32(0x6940 + radeon_crtc->crtc_offset, 0); in dce5_crtc_load_lut()
189 WREG32(CIK_ALPHA_CONTROL + radeon_crtc->crtc_offset, in dce5_crtc_load_lut()
196 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in legacy_crtc_load_lut() local
204 if (radeon_crtc->crtc_id == 0) in legacy_crtc_load_lut()
251 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_crtc_destroy() local
254 destroy_workqueue(radeon_crtc->flip_queue); in radeon_crtc_destroy()
255 kfree(radeon_crtc); in radeon_crtc_destroy()
285 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in radeon_crtc_handle_vblank() local
291 if (radeon_crtc == NULL) in radeon_crtc_handle_vblank()
307 if (radeon_crtc->flip_status != RADEON_FLIP_SUBMITTED) { in radeon_crtc_handle_vblank()
310 radeon_crtc->flip_status, in radeon_crtc_handle_vblank()
366 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in radeon_crtc_handle_flip() local
371 if (radeon_crtc == NULL) in radeon_crtc_handle_flip()
375 work = radeon_crtc->flip_work; in radeon_crtc_handle_flip()
376 if (radeon_crtc->flip_status != RADEON_FLIP_SUBMITTED) { in radeon_crtc_handle_flip()
379 radeon_crtc->flip_status, in radeon_crtc_handle_flip()
386 radeon_crtc->flip_status = RADEON_FLIP_NONE; in radeon_crtc_handle_flip()
387 radeon_crtc->flip_work = NULL; in radeon_crtc_handle_flip()
391 drm_crtc_send_vblank_event(&radeon_crtc->base, work->event); in radeon_crtc_handle_flip()
395 drm_crtc_vblank_put(&radeon_crtc->base); in radeon_crtc_handle_flip()
397 queue_work(radeon_crtc->flip_queue, &work->unpin_work); in radeon_crtc_handle_flip()
413 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[work->crtc_id]; in radeon_flip_work_func() local
415 struct drm_crtc *crtc = &radeon_crtc->base; in radeon_flip_work_func()
454 while (radeon_crtc->enabled && in radeon_flip_work_func()
469 radeon_irq_kms_pflip_irq_get(rdev, radeon_crtc->crtc_id); in radeon_flip_work_func()
472 radeon_page_flip(rdev, radeon_crtc->crtc_id, work->base, work->async); in radeon_flip_work_func()
474 radeon_crtc->flip_status = RADEON_FLIP_SUBMITTED; in radeon_flip_work_func()
488 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_crtc_page_flip_target() local
505 work->crtc_id = radeon_crtc->crtc_id; in radeon_crtc_page_flip_target()
549 base -= radeon_crtc->legacy_display_base_addr; in radeon_crtc_page_flip_target()
589 if (radeon_crtc->flip_status != RADEON_FLIP_NONE) { in radeon_crtc_page_flip_target()
595 radeon_crtc->flip_status = RADEON_FLIP_PENDING; in radeon_crtc_page_flip_target()
596 radeon_crtc->flip_work = work; in radeon_crtc_page_flip_target()
603 queue_work(radeon_crtc->flip_queue, &work->flip_work); in radeon_crtc_page_flip_target()
685 struct radeon_crtc *radeon_crtc; in radeon_crtc_init() local
687 …radeon_crtc = kzalloc(sizeof(struct radeon_crtc) + (RADEONFB_CONN_LIMIT * sizeof(struct drm_connec… in radeon_crtc_init()
688 if (radeon_crtc == NULL) in radeon_crtc_init()
691 drm_crtc_init(dev, &radeon_crtc->base, &radeon_crtc_funcs); in radeon_crtc_init()
693 drm_mode_crtc_set_gamma_size(&radeon_crtc->base, 256); in radeon_crtc_init()
694 radeon_crtc->crtc_id = index; in radeon_crtc_init()
695 radeon_crtc->flip_queue = alloc_workqueue("radeon-crtc", WQ_HIGHPRI, 0); in radeon_crtc_init()
696 rdev->mode_info.crtcs[index] = radeon_crtc; in radeon_crtc_init()
699 radeon_crtc->max_cursor_width = CIK_CURSOR_WIDTH; in radeon_crtc_init()
700 radeon_crtc->max_cursor_height = CIK_CURSOR_HEIGHT; in radeon_crtc_init()
702 radeon_crtc->max_cursor_width = CURSOR_WIDTH; in radeon_crtc_init()
703 radeon_crtc->max_cursor_height = CURSOR_HEIGHT; in radeon_crtc_init()
705 dev->mode_config.cursor_width = radeon_crtc->max_cursor_width; in radeon_crtc_init()
706 dev->mode_config.cursor_height = radeon_crtc->max_cursor_height; in radeon_crtc_init()
709 radeon_crtc->mode_set.crtc = &radeon_crtc->base; in radeon_crtc_init()
710 radeon_crtc->mode_set.connectors = (struct drm_connector **)(radeon_crtc + 1); in radeon_crtc_init()
711 radeon_crtc->mode_set.num_connectors = 0; in radeon_crtc_init()
715 radeon_atombios_init_crtc(dev, radeon_crtc); in radeon_crtc_init()
717 radeon_legacy_init_crtc(dev, radeon_crtc); in radeon_crtc_init()
1691 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_crtc_scaling_mode_fixup() local
1698 radeon_crtc->h_border = 0; in radeon_crtc_scaling_mode_fixup()
1699 radeon_crtc->v_border = 0; in radeon_crtc_scaling_mode_fixup()
1710 radeon_crtc->rmx_type = RMX_OFF; in radeon_crtc_scaling_mode_fixup()
1713 radeon_crtc->rmx_type = radeon_encoder->rmx_type; in radeon_crtc_scaling_mode_fixup()
1715 radeon_crtc->rmx_type = RMX_OFF; in radeon_crtc_scaling_mode_fixup()
1717 memcpy(&radeon_crtc->native_mode, in radeon_crtc_scaling_mode_fixup()
1721 dst_v = radeon_crtc->native_mode.vdisplay; in radeon_crtc_scaling_mode_fixup()
1723 dst_h = radeon_crtc->native_mode.hdisplay; in radeon_crtc_scaling_mode_fixup()
1733 radeon_crtc->h_border = radeon_encoder->underscan_hborder; in radeon_crtc_scaling_mode_fixup()
1735 radeon_crtc->h_border = (mode->hdisplay >> 5) + 16; in radeon_crtc_scaling_mode_fixup()
1737 radeon_crtc->v_border = radeon_encoder->underscan_vborder; in radeon_crtc_scaling_mode_fixup()
1739 radeon_crtc->v_border = (mode->vdisplay >> 5) + 16; in radeon_crtc_scaling_mode_fixup()
1740 radeon_crtc->rmx_type = RMX_FULL; in radeon_crtc_scaling_mode_fixup()
1742 dst_v = crtc->mode.vdisplay - (radeon_crtc->v_border * 2); in radeon_crtc_scaling_mode_fixup()
1744 dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2); in radeon_crtc_scaling_mode_fixup()
1748 if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) { in radeon_crtc_scaling_mode_fixup()
1760 if (radeon_crtc->rmx_type != RMX_OFF) { in radeon_crtc_scaling_mode_fixup()
1764 radeon_crtc->vsc.full = dfixed_div(a, b); in radeon_crtc_scaling_mode_fixup()
1767 radeon_crtc->hsc.full = dfixed_div(a, b); in radeon_crtc_scaling_mode_fixup()
1769 radeon_crtc->vsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()
1770 radeon_crtc->hsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()