Lines Matching refs:bo_va
204 struct radeon_bo_va *bo_va; in radeon_gem_object_open() local
217 bo_va = radeon_vm_bo_find(vm, rbo); in radeon_gem_object_open()
218 if (!bo_va) { in radeon_gem_object_open()
219 bo_va = radeon_vm_bo_add(rdev, vm, rbo); in radeon_gem_object_open()
221 ++bo_va->ref_count; in radeon_gem_object_open()
235 struct radeon_bo_va *bo_va; in radeon_gem_object_close() local
249 bo_va = radeon_vm_bo_find(vm, rbo); in radeon_gem_object_close()
250 if (bo_va) { in radeon_gem_object_close()
251 if (--bo_va->ref_count == 0) { in radeon_gem_object_close()
252 radeon_vm_bo_rmv(rdev, bo_va); in radeon_gem_object_close()
626 struct radeon_bo_va *bo_va) in radeon_gem_va_update_vm() argument
637 tv.bo = &bo_va->bo->tbo; in radeon_gem_va_update_vm()
641 vm_bos = radeon_vm_get_bos(rdev, bo_va->vm, &list); in radeon_gem_va_update_vm()
657 mutex_lock(&bo_va->vm->mutex); in radeon_gem_va_update_vm()
658 r = radeon_vm_clear_freed(rdev, bo_va->vm); in radeon_gem_va_update_vm()
662 if (bo_va->it.start) in radeon_gem_va_update_vm()
663 r = radeon_vm_bo_update(rdev, bo_va, bo_va->bo->tbo.resource); in radeon_gem_va_update_vm()
666 mutex_unlock(&bo_va->vm->mutex); in radeon_gem_va_update_vm()
686 struct radeon_bo_va *bo_va; in radeon_gem_va_ioctl() local
749 bo_va = radeon_vm_bo_find(&fpriv->vm, rbo); in radeon_gem_va_ioctl()
750 if (!bo_va) { in radeon_gem_va_ioctl()
759 if (bo_va->it.start) { in radeon_gem_va_ioctl()
761 args->offset = bo_va->it.start * RADEON_GPU_PAGE_SIZE; in radeon_gem_va_ioctl()
765 r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags); in radeon_gem_va_ioctl()
768 r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0); in radeon_gem_va_ioctl()
774 radeon_gem_va_update_vm(rdev, bo_va); in radeon_gem_va_ioctl()