Lines Matching refs:dpm
79 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
81 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
83 if (rdev->asic->dpm.enable_bapm) in radeon_pm_acpi_event_handler()
84 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
471 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state()
488 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
490 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
492 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; in radeon_set_dpm_state()
515 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_get_dpm_forced_performance_level()
552 if (rdev->asic->dpm.force_performance_level) { in radeon_set_dpm_forced_performance_level()
553 if (rdev->pm.dpm.thermal_active) { in radeon_set_dpm_forced_performance_level()
574 if (rdev->asic->dpm.fan_ctrl_get_mode) in radeon_hwmon_get_pwm1_enable()
575 pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev); in radeon_hwmon_get_pwm1_enable()
590 if(!rdev->asic->dpm.fan_ctrl_set_mode) in radeon_hwmon_set_pwm1_enable()
599 rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC); in radeon_hwmon_set_pwm1_enable()
602 rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0); in radeon_hwmon_set_pwm1_enable()
637 err = rdev->asic->dpm.set_fan_speed_percent(rdev, value); in radeon_hwmon_set_pwm1()
652 err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed); in radeon_hwmon_get_pwm1()
698 temp = rdev->pm.dpm.thermal.min_temp; in radeon_hwmon_show_temp_thresh()
700 temp = rdev->pm.dpm.thermal.max_temp; in radeon_hwmon_show_temp_thresh()
725 if (rdev->asic->dpm.get_current_sclk) in radeon_hwmon_show_sclk()
750 if (rdev->asic->dpm.get_current_vddc) in radeon_hwmon_show_vddc()
751 vddc = rdev->asic->dpm.get_current_vddc(rdev); in radeon_hwmon_show_vddc()
793 !rdev->asic->dpm.get_current_vddc) in hwmon_attributes_visible()
805 if ((!rdev->asic->dpm.get_fan_speed_percent && in hwmon_attributes_visible()
807 (!rdev->asic->dpm.fan_ctrl_get_mode && in hwmon_attributes_visible()
811 if ((!rdev->asic->dpm.set_fan_speed_percent && in hwmon_attributes_visible()
813 (!rdev->asic->dpm.fan_ctrl_set_mode && in hwmon_attributes_visible()
818 if ((!rdev->asic->dpm.set_fan_speed_percent && in hwmon_attributes_visible()
819 !rdev->asic->dpm.get_fan_speed_percent) && in hwmon_attributes_visible()
878 pm.dpm.thermal.work); in radeon_dpm_thermal_work_handler()
888 if (temp < rdev->pm.dpm.thermal.min_temp) in radeon_dpm_thermal_work_handler()
890 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
892 if (rdev->pm.dpm.thermal.high_to_low) in radeon_dpm_thermal_work_handler()
894 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
898 rdev->pm.dpm.thermal_active = true; in radeon_dpm_thermal_work_handler()
900 rdev->pm.dpm.thermal_active = false; in radeon_dpm_thermal_work_handler()
901 rdev->pm.dpm.state = dpm_state; in radeon_dpm_thermal_work_handler()
909 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? in radeon_dpm_single_display()
913 if (single_display && rdev->asic->dpm.vblank_too_short) { in radeon_dpm_single_display()
946 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_pick_power_state()
947 ps = &rdev->pm.dpm.ps[i]; in radeon_dpm_pick_power_state()
980 if (rdev->pm.dpm.uvd_ps) in radeon_dpm_pick_power_state()
981 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1001 return rdev->pm.dpm.boot_ps; in radeon_dpm_pick_power_state()
1030 if (rdev->pm.dpm.uvd_ps) { in radeon_dpm_pick_power_state()
1031 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1066 if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) { in radeon_dpm_change_power_state_locked()
1068 if ((!rdev->pm.dpm.thermal_active) && in radeon_dpm_change_power_state_locked()
1069 (!rdev->pm.dpm.uvd_active)) in radeon_dpm_change_power_state_locked()
1070 rdev->pm.dpm.state = rdev->pm.dpm.user_state; in radeon_dpm_change_power_state_locked()
1072 dpm_state = rdev->pm.dpm.state; in radeon_dpm_change_power_state_locked()
1076 rdev->pm.dpm.requested_ps = ps; in radeon_dpm_change_power_state_locked()
1081 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { in radeon_dpm_change_power_state_locked()
1083 if (ps->vce_active != rdev->pm.dpm.vce_active) in radeon_dpm_change_power_state_locked()
1086 if (rdev->pm.dpm.single_display != single_display) in radeon_dpm_change_power_state_locked()
1092 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1097 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1098 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1106 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()
1107 rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1110 if ((rdev->pm.dpm.current_active_crtc_count > 1) && in radeon_dpm_change_power_state_locked()
1111 (rdev->pm.dpm.new_active_crtc_count > 1)) { in radeon_dpm_change_power_state_locked()
1116 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1117 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1127 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); in radeon_dpm_change_power_state_locked()
1129 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps); in radeon_dpm_change_power_state_locked()
1136 ps->vce_active = rdev->pm.dpm.vce_active; in radeon_dpm_change_power_state_locked()
1158 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps; in radeon_dpm_change_power_state_locked()
1162 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1163 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1164 rdev->pm.dpm.single_display = single_display; in radeon_dpm_change_power_state_locked()
1166 if (rdev->asic->dpm.force_performance_level) { in radeon_dpm_change_power_state_locked()
1167 if (rdev->pm.dpm.thermal_active) { in radeon_dpm_change_power_state_locked()
1168 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_dpm_change_power_state_locked()
1172 rdev->pm.dpm.forced_level = level; in radeon_dpm_change_power_state_locked()
1175 radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); in radeon_dpm_change_power_state_locked()
1188 if (rdev->asic->dpm.powergate_uvd) { in radeon_dpm_enable_uvd()
1192 enable |= rdev->pm.dpm.sd > 0; in radeon_dpm_enable_uvd()
1193 enable |= rdev->pm.dpm.hd > 0; in radeon_dpm_enable_uvd()
1200 rdev->pm.dpm.uvd_active = true; in radeon_dpm_enable_uvd()
1203 if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1205 else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1207 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1)) in radeon_dpm_enable_uvd()
1209 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) in radeon_dpm_enable_uvd()
1214 rdev->pm.dpm.state = dpm_state; in radeon_dpm_enable_uvd()
1218 rdev->pm.dpm.uvd_active = false; in radeon_dpm_enable_uvd()
1230 rdev->pm.dpm.vce_active = true; in radeon_dpm_enable_vce()
1232 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; in radeon_dpm_enable_vce()
1236 rdev->pm.dpm.vce_active = false; in radeon_dpm_enable_vce()
1261 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_suspend_dpm()
1317 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_resume_dpm()
1410 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_print_power_states()
1412 radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]); in radeon_dpm_print_power_states()
1421 rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1422 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1423 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; in radeon_pm_init_dpm()
1440 INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler); in radeon_pm_init_dpm()
1443 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_init_dpm()
1778 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()
1779 rdev->pm.dpm.new_active_crtc_count = 0; in radeon_pm_compute_clocks_dpm()
1780 rdev->pm.dpm.high_pixelclock_count = 0; in radeon_pm_compute_clocks_dpm()
1786 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1787 rdev->pm.dpm.new_active_crtc_count++; in radeon_pm_compute_clocks_dpm()
1793 rdev->pm.dpm.high_pixelclock_count++; in radeon_pm_compute_clocks_dpm()
1800 rdev->pm.dpm.ac_power = true; in radeon_pm_compute_clocks_dpm()
1802 rdev->pm.dpm.ac_power = false; in radeon_pm_compute_clocks_dpm()
1927 if (rdev->asic->dpm.debugfs_print_current_performance_level) in radeon_debugfs_pm_info_show()