Lines Matching refs:dividers

42 	struct atom_clock_dividers dividers;  in rv730_populate_sclk_value()  local
55 					     engine_clock, false, &dividers);  in rv730_populate_sclk_value()
59 	reference_divider = 1 + dividers.ref_div;  in rv730_populate_sclk_value()
61 	if (dividers.enable_post_div)  in rv730_populate_sclk_value()
62 		post_divider = ((dividers.post_div >> 4) & 0xf) +  in rv730_populate_sclk_value()
63 			(dividers.post_div & 0xf) + 2;  in rv730_populate_sclk_value()
72 	if (dividers.enable_post_div)  in rv730_populate_sclk_value()
77 	spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div);  in rv730_populate_sclk_value()
78 	spll_func_cntl |= SPLL_HILEN((dividers.post_div >> 4) & 0xf);  in rv730_populate_sclk_value()
79 	spll_func_cntl |= SPLL_LOLEN(dividers.post_div & 0xf);  in rv730_populate_sclk_value()
128 	struct atom_clock_dividers dividers;  in rv730_populate_mclk_value()  local
133 					     memory_clock, false, &dividers);  in rv730_populate_mclk_value()
137 	reference_divider = dividers.ref_div + 1;  in rv730_populate_mclk_value()
139 	if (dividers.enable_post_div)  in rv730_populate_mclk_value()
140 		post_divider = ((dividers.post_div >> 4) & 0xf) +  in rv730_populate_mclk_value()
141 			(dividers.post_div & 0xf) + 2;  in rv730_populate_mclk_value()
146 	if (dividers.enable_post_div)  in rv730_populate_mclk_value()
152 	mpll_func_cntl |= MPLL_REF_DIV(dividers.ref_div);  in rv730_populate_mclk_value()
153 	mpll_func_cntl |= MPLL_HILEN((dividers.post_div >> 4) & 0xf);  in rv730_populate_mclk_value()
154 	mpll_func_cntl |= MPLL_LOLEN(dividers.post_div & 0xf);  in rv730_populate_mclk_value()
157 	mpll_func_cntl_3 |= MPLL_FB_DIV(dividers.fb_div);  in rv730_populate_mclk_value()
158 	if (dividers.enable_dithen)  in rv730_populate_mclk_value()
171 			u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000);  in rv730_populate_mclk_value()