Lines Matching refs:dpm
58 struct rv7xx_power_info *pi = rdev->pm.dpm.priv; in rv770_get_pi()
65 struct evergreen_power_info *pi = rdev->pm.dpm.priv; in evergreen_get_pi()
1192 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) { in rv770_init_smc_table()
1195 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT) in rv770_init_smc_table()
1198 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT) in rv770_init_smc_table()
1202 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) in rv770_init_smc_table()
1348 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv770_program_display_gap()
1351 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv770_program_display_gap()
1500 rdev->pm.dpm.forced_level = level; in rv770_dpm_force_performance_level()
1709 voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time; in rv770_program_response_times()
1710 backbias_response_time = (u32)rdev->pm.dpm.backbias_response_time; in rv770_program_response_times()
1889 rdev->pm.dpm.thermal.min_temp = low_temp; in rv770_set_thermal_temperature_range()
1890 rdev->pm.dpm.thermal.max_temp = high_temp; in rv770_set_thermal_temperature_range()
1898 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rv770_dpm_enable()
1927 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) in rv770_dpm_enable()
2041 struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; in rv770_dpm_set_power_state()
2042 struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; in rv770_dpm_set_power_state()
2085 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
2110 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L0s) in rv770_dpm_setup_asic()
2112 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_ASPM_L1) in rv770_dpm_setup_asic()
2114 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1) in rv770_dpm_setup_asic()
2170 rdev->pm.dpm.boot_ps = rps; in rv7xx_parse_pplib_non_clock_info()
2172 rdev->pm.dpm.uvd_ps = rps; in rv7xx_parse_pplib_non_clock_info()
2261 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; in rv7xx_parse_pplib_clock_info()
2262 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk; in rv7xx_parse_pplib_clock_info()
2263 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc; in rv7xx_parse_pplib_clock_info()
2264 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; in rv7xx_parse_pplib_clock_info()
2286 rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates, in rv7xx_parse_power_table()
2289 if (!rdev->pm.dpm.ps) in rv7xx_parse_power_table()
2306 kfree(rdev->pm.dpm.ps); in rv7xx_parse_power_table()
2309 rdev->pm.dpm.ps[i].ps_priv = ps; in rv7xx_parse_power_table()
2310 rv7xx_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], in rv7xx_parse_power_table()
2320 &rdev->pm.dpm.ps[i], j, in rv7xx_parse_power_table()
2325 rdev->pm.dpm.num_ps = power_info->pplib.ucNumStates; in rv7xx_parse_power_table()
2354 rdev->pm.dpm.priv = pi; in rv770_dpm_init()
2370 if (rdev->pm.dpm.voltage_response_time == 0) in rv770_dpm_init()
2371 rdev->pm.dpm.voltage_response_time = R600_VOLTAGERESPONSETIME_DFLT; in rv770_dpm_init()
2372 if (rdev->pm.dpm.backbias_response_time == 0) in rv770_dpm_init()
2373 rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT; in rv770_dpm_init()
2470 struct radeon_ps *rps = rdev->pm.dpm.current_ps; in rv770_dpm_debugfs_print_current_performance_level()
2499 struct radeon_ps *rps = rdev->pm.dpm.current_ps; in rv770_dpm_get_current_sclk()
2521 struct radeon_ps *rps = rdev->pm.dpm.current_ps; in rv770_dpm_get_current_mclk()
2545 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in rv770_dpm_fini()
2546 kfree(rdev->pm.dpm.ps[i].ps_priv); in rv770_dpm_fini()
2548 kfree(rdev->pm.dpm.ps); in rv770_dpm_fini()
2549 kfree(rdev->pm.dpm.priv); in rv770_dpm_fini()
2554 struct rv7xx_ps *requested_state = rv770_get_ps(rdev->pm.dpm.requested_ps); in rv770_dpm_get_sclk()
2564 struct rv7xx_ps *requested_state = rv770_get_ps(rdev->pm.dpm.requested_ps); in rv770_dpm_get_mclk()