Lines Matching refs:smc_state
259 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_t() argument
291 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
297 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
305 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_sp() argument
311 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
313 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
677 RV770_SMC_SWSTATE *smc_state) in rv770_convert_power_state_to_smc() argument
683 smc_state->flags |= PPSMC_SWSTATE_FLAG_DC; in rv770_convert_power_state_to_smc()
687 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
694 &smc_state->levels[1], in rv770_convert_power_state_to_smc()
701 &smc_state->levels[2], in rv770_convert_power_state_to_smc()
706 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
707 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in rv770_convert_power_state_to_smc()
708 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in rv770_convert_power_state_to_smc()
710 smc_state->levels[0].seqValue = rv770_get_seq_value(rdev, in rv770_convert_power_state_to_smc()
712 smc_state->levels[1].seqValue = rv770_get_seq_value(rdev, in rv770_convert_power_state_to_smc()
714 smc_state->levels[2].seqValue = rv770_get_seq_value(rdev, in rv770_convert_power_state_to_smc()
717 rv770_populate_smc_sp(rdev, radeon_state, smc_state); in rv770_convert_power_state_to_smc()
719 return rv770_populate_smc_t(rdev, radeon_state, smc_state); in rv770_convert_power_state_to_smc()