Lines Matching refs:vddci
2954 u16 vddc, vddci, min_vce_voltage = 0; in si_apply_state_adjust_rules() local
3023 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()
3024 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
3063 vddci = ps->performance_levels[ps->performance_level_count - 1].vddci; in si_apply_state_adjust_rules()
3066 vddci = ps->performance_levels[0].vddci; in si_apply_state_adjust_rules()
3088 ps->performance_levels[0].vddci = vddci; in si_apply_state_adjust_rules()
3117 ps->performance_levels[i].vddci = vddci; in si_apply_state_adjust_rules()
3123 if (ps->performance_levels[i].vddci < ps->performance_levels[i - 1].vddci) in si_apply_state_adjust_rules()
3124 ps->performance_levels[i].vddci = ps->performance_levels[i - 1].vddci; in si_apply_state_adjust_rules()
3140 max_limits->vddci, &ps->performance_levels[i].vddci); in si_apply_state_adjust_rules()
3151 max_limits->vddc, max_limits->vddci, in si_apply_state_adjust_rules()
3153 &ps->performance_levels[i].vddci); in si_apply_state_adjust_rules()
4418 initial_state->performance_levels[0].vddci, in si_populate_smc_initial_state()
4419 &table->initialState.level.vddci); in si_populate_smc_initial_state()
4547 &table->ACPIState.level.vddci); in si_populate_smc_acpi_state()
5044 pl->vddci, &level->vddci); in si_convert_power_level_to_smc()
6732 pl->vddci = le16_to_cpu(clock_info->si.usVDDCI); in si_parse_pplib_clock_info()
6747 eg_pi->acpi_vddci = pl->vddci; in si_parse_pplib_clock_info()
6770 u16 vddc, vddci, mvdd; in si_parse_pplib_clock_info() local
6771 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in si_parse_pplib_clock_info()
6775 pl->vddci = vddci; in si_parse_pplib_clock_info()
6784 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; in si_parse_pplib_clock_info()
7089 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1); in si_dpm_debugfs_print_current_performance_level()