Lines Matching refs:levels
805 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
925 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
926 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
939 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
940 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1287 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state()
1310 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state()
1365 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state()
1366 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1372 ps->levels[0].vddc_index = current_vddc; in trinity_patch_thermal_state()
1374 if (ps->levels[0].sclk > current_sclk) in trinity_patch_thermal_state()
1375 ps->levels[0].sclk = current_sclk; in trinity_patch_thermal_state()
1377 ps->levels[0].ds_divider_index = in trinity_patch_thermal_state()
1378 trinity_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr); in trinity_patch_thermal_state()
1379 ps->levels[0].ss_divider_index = ps->levels[0].ds_divider_index; in trinity_patch_thermal_state()
1380 ps->levels[0].allow_gnb_slow = 1; in trinity_patch_thermal_state()
1381 ps->levels[0].force_nbp_state = 0; in trinity_patch_thermal_state()
1382 ps->levels[0].display_wm = 0; in trinity_patch_thermal_state()
1383 ps->levels[0].vce_wm = in trinity_patch_thermal_state()
1384 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk); in trinity_patch_thermal_state()
1400 else if (ps->levels[index].sclk < 30000) in trinity_calculate_display_wm()
1519 if (ps->levels[i].vddc_index < min_voltage) in trinity_apply_state_adjust_rules()
1520 ps->levels[i].vddc_index = min_voltage; in trinity_apply_state_adjust_rules()
1522 if (ps->levels[i].sclk < min_sclk) in trinity_apply_state_adjust_rules()
1523 ps->levels[i].sclk = in trinity_apply_state_adjust_rules()
1529 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in trinity_apply_state_adjust_rules()
1530 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in trinity_apply_state_adjust_rules()
1533 if (ps->levels[i].vddc_index < min_vce_voltage) in trinity_apply_state_adjust_rules()
1534 ps->levels[i].vddc_index = min_vce_voltage; in trinity_apply_state_adjust_rules()
1537 ps->levels[i].ds_divider_index = in trinity_apply_state_adjust_rules()
1538 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr); in trinity_apply_state_adjust_rules()
1540 ps->levels[i].ss_divider_index = ps->levels[i].ds_divider_index; in trinity_apply_state_adjust_rules()
1542 ps->levels[i].allow_gnb_slow = 1; in trinity_apply_state_adjust_rules()
1543 ps->levels[i].force_nbp_state = 0; in trinity_apply_state_adjust_rules()
1544 ps->levels[i].display_wm = in trinity_apply_state_adjust_rules()
1546 ps->levels[i].vce_wm = in trinity_apply_state_adjust_rules()
1547 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk); in trinity_apply_state_adjust_rules()
1570 ps->levels[ps->num_levels - 1].allow_gnb_slow = 0; in trinity_apply_state_adjust_rules()
1669 struct trinity_pl *pl = &ps->levels[index]; in trinity_parse_pplib_clock_info()
1977 struct trinity_pl *pl = &ps->levels[i]; in trinity_dpm_print_power_state()
1999 pl = &ps->levels[current_index]; in trinity_dpm_debugfs_print_current_performance_level()
2020 pl = &ps->levels[current_index]; in trinity_dpm_get_current_sclk()
2052 return requested_state->levels[0].sclk; in trinity_dpm_get_sclk()
2054 return requested_state->levels[requested_state->num_levels - 1].sclk; in trinity_dpm_get_sclk()