Lines Matching refs:VC4_SET_FIELD
1056 csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR, in vc4_hdmi_csc_setup()
1072 csc_ctl |= VC4_SET_FIELD(VC4_HD_CSC_CTL_MODE_CUSTOM, in vc4_hdmi_csc_setup()
1180 u32 csc_ctl = VC5_MT_CP_CSC_CTL_ENABLE | VC4_SET_FIELD(VC4_HD_CSC_CTL_MODE_CUSTOM, in vc5_hdmi_csc_setup()
1195 csc_ctl |= VC4_SET_FIELD(VC5_MT_CP_CSC_CTL_FILTER_MODE_444_TO_422_STANDARD, in vc5_hdmi_csc_setup()
1200 csc_chan_ctl |= VC4_SET_FIELD(VC5_MT_CP_CHANNEL_CTL_OUTPUT_REMAP_LEGACY_STYLE, in vc5_hdmi_csc_setup()
1203 if_cfg |= VC4_SET_FIELD(VC5_DVP_HT_VEC_INTERFACE_CFG_SEL_422_FORMAT_422_LEGACY, in vc5_hdmi_csc_setup()
1241 u32 verta = (VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start, in vc4_hdmi_set_timings()
1243 VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay, in vc4_hdmi_set_timings()
1245 VC4_SET_FIELD(mode->crtc_vdisplay, VC4_HDMI_VERTA_VAL)); in vc4_hdmi_set_timings()
1246 u32 vertb = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) | in vc4_hdmi_set_timings()
1247 VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end + in vc4_hdmi_set_timings()
1250 u32 vertb_even = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) | in vc4_hdmi_set_timings()
1251 VC4_SET_FIELD(mode->crtc_vtotal - in vc4_hdmi_set_timings()
1266 VC4_SET_FIELD(mode->hdisplay * pixel_rep, in vc4_hdmi_set_timings()
1270 VC4_SET_FIELD((mode->htotal - in vc4_hdmi_set_timings()
1273 VC4_SET_FIELD((mode->hsync_end - in vc4_hdmi_set_timings()
1276 VC4_SET_FIELD((mode->hsync_start - in vc4_hdmi_set_timings()
1288 reg |= VC4_SET_FIELD(pixel_rep - 1, VC4_HDMI_MISC_CONTROL_PIXEL_REP); in vc4_hdmi_set_timings()
1307 u32 verta = (VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start, in vc5_hdmi_set_timings()
1309 VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay, in vc5_hdmi_set_timings()
1311 VC4_SET_FIELD(mode->crtc_vdisplay, VC5_HDMI_VERTA_VAL)); in vc5_hdmi_set_timings()
1312 u32 vertb = (VC4_SET_FIELD(mode->htotal >> (2 - pixel_rep), in vc5_hdmi_set_timings()
1314 VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end + in vc5_hdmi_set_timings()
1317 u32 vertb_even = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) | in vc5_hdmi_set_timings()
1318 VC4_SET_FIELD(mode->crtc_vtotal - in vc5_hdmi_set_timings()
1334 VC4_SET_FIELD(mode->hdisplay * pixel_rep, in vc5_hdmi_set_timings()
1336 VC4_SET_FIELD((mode->hsync_start - in vc5_hdmi_set_timings()
1341 VC4_SET_FIELD((mode->htotal - in vc5_hdmi_set_timings()
1344 VC4_SET_FIELD((mode->hsync_end - in vc5_hdmi_set_timings()
1378 reg |= VC4_SET_FIELD(2, VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE) | in vc5_hdmi_set_timings()
1379 VC4_SET_FIELD(gcp, VC5_HDMI_DEEP_COLOR_CONFIG_1_COLOR_DEPTH); in vc5_hdmi_set_timings()
1384 reg |= VC4_SET_FIELD(gcp, VC5_HDMI_GCP_WORD_1_GCP_SUBPACKET_BYTE_1); in vc5_hdmi_set_timings()
1395 reg |= VC4_SET_FIELD(pixel_rep - 1, VC5_HDMI_MISC_CONTROL_PIXEL_REP); in vc5_hdmi_set_timings()
2085 VC4_SET_FIELD(n, VC4_HD_MAI_SMP_N) | in vc4_hdmi_audio_set_mai_clock()
2086 VC4_SET_FIELD(m - 1, VC4_HD_MAI_SMP_M)); in vc4_hdmi_audio_set_mai_clock()
2108 VC4_SET_FIELD(n, VC4_HDMI_CRP_CFG_N)); in vc4_hdmi_set_n_cts()
2315 VC4_SET_FIELD(channels, VC4_HD_MAI_CTL_CHNUM) | in vc4_hdmi_audio_prepare()
2327 VC4_SET_FIELD(mai_sample_rate, in vc4_hdmi_audio_prepare()
2329 VC4_SET_FIELD(mai_audio_format, in vc4_hdmi_audio_prepare()
2336 VC4_SET_FIELD(0x8, VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER); in vc4_hdmi_audio_prepare()
2339 audio_packet_config |= VC4_SET_FIELD(channel_mask, in vc4_hdmi_audio_prepare()
2344 VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICHIGH) | in vc4_hdmi_audio_prepare()
2345 VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_PANICLOW) | in vc4_hdmi_audio_prepare()
2346 VC4_SET_FIELD(0x06, VC4_HD_MAI_THR_DREQHIGH) | in vc4_hdmi_audio_prepare()
2347 VC4_SET_FIELD(0x08, VC4_HD_MAI_THR_DREQLOW)); in vc4_hdmi_audio_prepare()
2352 VC4_SET_FIELD(channel_mask, VC4_HDMI_MAI_CHANNEL_MASK)); in vc4_hdmi_audio_prepare()