Lines Matching refs:i2c_dev
299 static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, in dvc_writel() argument
302 writel_relaxed(val, i2c_dev->base + reg); in dvc_writel()
305 static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in dvc_readl() argument
307 return readl_relaxed(i2c_dev->base + reg); in dvc_readl()
314 static u32 tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in tegra_i2c_reg_addr() argument
316 if (i2c_dev->is_dvc) in tegra_i2c_reg_addr()
318 else if (i2c_dev->is_vi) in tegra_i2c_reg_addr()
324 static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned int reg) in i2c_writel() argument
326 writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
330 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
331 else if (i2c_dev->is_vi) in i2c_writel()
332 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, I2C_INT_STATUS)); in i2c_writel()
335 static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in i2c_readl() argument
337 return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_readl()
340 static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_writesl() argument
343 writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_writesl()
346 static void i2c_writesl_vi(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_writesl_vi() argument
358 i2c_writel(i2c_dev, *data32++, reg); in i2c_writesl_vi()
361 static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_readsl() argument
364 readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_readsl()
367 static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_mask_irq() argument
371 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) & ~mask; in tegra_i2c_mask_irq()
372 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_mask_irq()
375 static void tegra_i2c_unmask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_unmask_irq() argument
379 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) | mask; in tegra_i2c_unmask_irq()
380 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_unmask_irq()
385 struct tegra_i2c_dev *i2c_dev = args; in tegra_i2c_dma_complete() local
387 complete(&i2c_dev->dma_complete); in tegra_i2c_dma_complete()
390 static int tegra_i2c_dma_submit(struct tegra_i2c_dev *i2c_dev, size_t len) in tegra_i2c_dma_submit() argument
396 dev_dbg(i2c_dev->dev, "starting DMA for length: %zu\n", len); in tegra_i2c_dma_submit()
398 reinit_completion(&i2c_dev->dma_complete); in tegra_i2c_dma_submit()
400 dir = i2c_dev->msg_read ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; in tegra_i2c_dma_submit()
401 chan = i2c_dev->msg_read ? i2c_dev->rx_dma_chan : i2c_dev->tx_dma_chan; in tegra_i2c_dma_submit()
403 dma_desc = dmaengine_prep_slave_single(chan, i2c_dev->dma_phys, in tegra_i2c_dma_submit()
407 dev_err(i2c_dev->dev, "failed to get %s DMA descriptor\n", in tegra_i2c_dma_submit()
408 i2c_dev->msg_read ? "RX" : "TX"); in tegra_i2c_dma_submit()
413 dma_desc->callback_param = i2c_dev; in tegra_i2c_dma_submit()
421 static void tegra_i2c_release_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_dma() argument
423 if (i2c_dev->dma_buf) { in tegra_i2c_release_dma()
424 dma_free_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size, in tegra_i2c_release_dma()
425 i2c_dev->dma_buf, i2c_dev->dma_phys); in tegra_i2c_release_dma()
426 i2c_dev->dma_buf = NULL; in tegra_i2c_release_dma()
429 if (i2c_dev->tx_dma_chan) { in tegra_i2c_release_dma()
430 dma_release_channel(i2c_dev->tx_dma_chan); in tegra_i2c_release_dma()
431 i2c_dev->tx_dma_chan = NULL; in tegra_i2c_release_dma()
434 if (i2c_dev->rx_dma_chan) { in tegra_i2c_release_dma()
435 dma_release_channel(i2c_dev->rx_dma_chan); in tegra_i2c_release_dma()
436 i2c_dev->rx_dma_chan = NULL; in tegra_i2c_release_dma()
440 static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_dma() argument
447 if (i2c_dev->is_vi) in tegra_i2c_init_dma()
450 if (!i2c_dev->hw->has_apb_dma) { in tegra_i2c_init_dma()
452 dev_dbg(i2c_dev->dev, "APB DMA support not enabled\n"); in tegra_i2c_init_dma()
456 dev_dbg(i2c_dev->dev, "GPC DMA support not enabled\n"); in tegra_i2c_init_dma()
460 chan = dma_request_chan(i2c_dev->dev, "rx"); in tegra_i2c_init_dma()
466 i2c_dev->rx_dma_chan = chan; in tegra_i2c_init_dma()
468 chan = dma_request_chan(i2c_dev->dev, "tx"); in tegra_i2c_init_dma()
474 i2c_dev->tx_dma_chan = chan; in tegra_i2c_init_dma()
476 WARN_ON(i2c_dev->tx_dma_chan->device != i2c_dev->rx_dma_chan->device); in tegra_i2c_init_dma()
477 i2c_dev->dma_dev = chan->device->dev; in tegra_i2c_init_dma()
479 i2c_dev->dma_buf_size = i2c_dev->hw->quirks->max_write_len + in tegra_i2c_init_dma()
482 dma_buf = dma_alloc_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size, in tegra_i2c_init_dma()
485 dev_err(i2c_dev->dev, "failed to allocate DMA buffer\n"); in tegra_i2c_init_dma()
490 i2c_dev->dma_buf = dma_buf; in tegra_i2c_init_dma()
491 i2c_dev->dma_phys = dma_phys; in tegra_i2c_init_dma()
496 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_init_dma()
498 dev_err(i2c_dev->dev, "cannot use DMA: %d\n", err); in tegra_i2c_init_dma()
499 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_init_dma()
513 static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev) in tegra_dvc_init() argument
517 val = dvc_readl(i2c_dev, DVC_CTRL_REG3); in tegra_dvc_init()
520 dvc_writel(i2c_dev, val, DVC_CTRL_REG3); in tegra_dvc_init()
522 val = dvc_readl(i2c_dev, DVC_CTRL_REG1); in tegra_dvc_init()
524 dvc_writel(i2c_dev, val, DVC_CTRL_REG1); in tegra_dvc_init()
527 static void tegra_i2c_vi_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_vi_init() argument
533 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
539 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
543 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
548 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
551 i2c_writel(i2c_dev, value, I2C_BUS_CLEAR_CNFG); in tegra_i2c_vi_init()
553 i2c_writel(i2c_dev, 0x0, I2C_TLOW_SEXT); in tegra_i2c_vi_init()
556 static int tegra_i2c_poll_register(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_register() argument
560 void __iomem *addr = i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg); in tegra_i2c_poll_register()
563 if (!i2c_dev->atomic_mode) in tegra_i2c_poll_register()
571 static int tegra_i2c_flush_fifos(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_flush_fifos() argument
576 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_flush_fifos()
586 val = i2c_readl(i2c_dev, offset); in tegra_i2c_flush_fifos()
588 i2c_writel(i2c_dev, val, offset); in tegra_i2c_flush_fifos()
590 err = tegra_i2c_poll_register(i2c_dev, offset, mask, 1000, 1000000); in tegra_i2c_flush_fifos()
592 dev_err(i2c_dev->dev, "failed to flush FIFO\n"); in tegra_i2c_flush_fifos()
599 static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_wait_for_config_load() argument
603 if (!i2c_dev->hw->has_config_load_reg) in tegra_i2c_wait_for_config_load()
606 i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); in tegra_i2c_wait_for_config_load()
608 err = tegra_i2c_poll_register(i2c_dev, I2C_CONFIG_LOAD, 0xffffffff, in tegra_i2c_wait_for_config_load()
611 dev_err(i2c_dev->dev, "failed to load config\n"); in tegra_i2c_wait_for_config_load()
618 static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init() argument
621 acpi_handle handle = ACPI_HANDLE(i2c_dev->dev); in tegra_i2c_init()
622 struct i2c_timings *t = &i2c_dev->timings; in tegra_i2c_init()
636 err = reset_control_reset(i2c_dev->rst); in tegra_i2c_init()
640 if (i2c_dev->is_dvc) in tegra_i2c_init()
641 tegra_dvc_init(i2c_dev); in tegra_i2c_init()
646 if (i2c_dev->hw->has_multi_master_mode) in tegra_i2c_init()
649 i2c_writel(i2c_dev, val, I2C_CNFG); in tegra_i2c_init()
650 i2c_writel(i2c_dev, 0, I2C_INT_MASK); in tegra_i2c_init()
652 if (i2c_dev->is_vi) in tegra_i2c_init()
653 tegra_i2c_vi_init(i2c_dev); in tegra_i2c_init()
658 tlow = i2c_dev->hw->tlow_fast_fastplus_mode; in tegra_i2c_init()
659 thigh = i2c_dev->hw->thigh_fast_fastplus_mode; in tegra_i2c_init()
660 tsu_thd = i2c_dev->hw->setup_hold_time_fast_fast_plus_mode; in tegra_i2c_init()
663 non_hs_mode = i2c_dev->hw->clk_divisor_fast_plus_mode; in tegra_i2c_init()
665 non_hs_mode = i2c_dev->hw->clk_divisor_fast_mode; in tegra_i2c_init()
669 tlow = i2c_dev->hw->tlow_std_mode; in tegra_i2c_init()
670 thigh = i2c_dev->hw->thigh_std_mode; in tegra_i2c_init()
671 tsu_thd = i2c_dev->hw->setup_hold_time_std_mode; in tegra_i2c_init()
672 non_hs_mode = i2c_dev->hw->clk_divisor_std_mode; in tegra_i2c_init()
678 i2c_dev->hw->clk_divisor_hs_mode) | in tegra_i2c_init()
680 i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR); in tegra_i2c_init()
682 if (i2c_dev->hw->has_interface_timing_reg) { in tegra_i2c_init()
685 i2c_writel(i2c_dev, val, I2C_INTERFACE_TIMING_0); in tegra_i2c_init()
692 if (i2c_dev->hw->has_interface_timing_reg && tsu_thd) in tegra_i2c_init()
693 i2c_writel(i2c_dev, tsu_thd, I2C_INTERFACE_TIMING_1); in tegra_i2c_init()
697 err = clk_set_rate(i2c_dev->div_clk, in tegra_i2c_init()
700 dev_err(i2c_dev->dev, "failed to set div-clk rate: %d\n", err); in tegra_i2c_init()
704 if (!i2c_dev->is_dvc && !i2c_dev->is_vi) { in tegra_i2c_init()
705 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG); in tegra_i2c_init()
708 i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG); in tegra_i2c_init()
709 i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1); in tegra_i2c_init()
710 i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2); in tegra_i2c_init()
713 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_init()
717 if (i2c_dev->multimaster_mode && i2c_dev->hw->has_slcg_override_reg) in tegra_i2c_init()
718 i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE); in tegra_i2c_init()
720 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_init()
727 static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_disable_packet_mode() argument
737 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->timings.bus_freq_hz)); in tegra_i2c_disable_packet_mode()
739 cnfg = i2c_readl(i2c_dev, I2C_CNFG); in tegra_i2c_disable_packet_mode()
741 i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG); in tegra_i2c_disable_packet_mode()
743 return tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_disable_packet_mode()
746 static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_empty_rx_fifo() argument
748 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_empty_rx_fifo()
750 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_empty_rx_fifo()
757 if (WARN_ON_ONCE(!(i2c_dev->msg_buf_remaining))) in tegra_i2c_empty_rx_fifo()
760 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_empty_rx_fifo()
761 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
764 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
773 i2c_readsl(i2c_dev, buf, I2C_RX_FIFO, words_to_transfer); in tegra_i2c_empty_rx_fifo()
789 val = i2c_readl(i2c_dev, I2C_RX_FIFO); in tegra_i2c_empty_rx_fifo()
800 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_empty_rx_fifo()
801 i2c_dev->msg_buf = buf; in tegra_i2c_empty_rx_fifo()
806 static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_fill_tx_fifo() argument
808 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_fill_tx_fifo()
810 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_fill_tx_fifo()
813 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_fill_tx_fifo()
814 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
817 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
844 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_fill_tx_fifo()
845 i2c_dev->msg_buf = buf + words_to_transfer * BYTES_PER_FIFO_WORD; in tegra_i2c_fill_tx_fifo()
847 if (i2c_dev->is_vi) in tegra_i2c_fill_tx_fifo()
848 i2c_writesl_vi(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); in tegra_i2c_fill_tx_fifo()
850 i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); in tegra_i2c_fill_tx_fifo()
869 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_fill_tx_fifo()
870 i2c_dev->msg_buf = NULL; in tegra_i2c_fill_tx_fifo()
872 i2c_writel(i2c_dev, val, I2C_TX_FIFO); in tegra_i2c_fill_tx_fifo()
881 struct tegra_i2c_dev *i2c_dev = dev_id; in tegra_i2c_isr() local
884 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_isr()
887 dev_warn(i2c_dev->dev, "IRQ status 0 %08x %08x %08x\n", in tegra_i2c_isr()
888 i2c_readl(i2c_dev, I2C_PACKET_TRANSFER_STATUS), in tegra_i2c_isr()
889 i2c_readl(i2c_dev, I2C_STATUS), in tegra_i2c_isr()
890 i2c_readl(i2c_dev, I2C_CNFG)); in tegra_i2c_isr()
891 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
896 tegra_i2c_disable_packet_mode(i2c_dev); in tegra_i2c_isr()
898 i2c_dev->msg_err |= I2C_ERR_NO_ACK; in tegra_i2c_isr()
900 i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST; in tegra_i2c_isr()
908 if (i2c_dev->hw->supports_bus_clear && (status & I2C_INT_BUS_CLR_DONE)) in tegra_i2c_isr()
911 if (!i2c_dev->dma_mode) { in tegra_i2c_isr()
912 if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
913 if (tegra_i2c_empty_rx_fifo(i2c_dev)) { in tegra_i2c_isr()
919 i2c_dev->msg_err |= I2C_ERR_RX_BUFFER_OVERFLOW; in tegra_i2c_isr()
924 if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
925 if (i2c_dev->msg_buf_remaining) in tegra_i2c_isr()
926 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_isr()
928 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
933 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
934 if (i2c_dev->is_dvc) in tegra_i2c_isr()
935 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
946 if (i2c_dev->dma_mode) in tegra_i2c_isr()
947 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_isr()
952 if (WARN_ON_ONCE(i2c_dev->msg_buf_remaining)) { in tegra_i2c_isr()
953 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
956 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
961 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
968 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_isr()
969 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_isr()
971 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
973 if (i2c_dev->is_dvc) in tegra_i2c_isr()
974 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
976 if (i2c_dev->dma_mode) { in tegra_i2c_isr()
977 if (i2c_dev->msg_read) in tegra_i2c_isr()
978 dmaengine_terminate_async(i2c_dev->rx_dma_chan); in tegra_i2c_isr()
980 dmaengine_terminate_async(i2c_dev->tx_dma_chan); in tegra_i2c_isr()
982 complete(&i2c_dev->dma_complete); in tegra_i2c_isr()
985 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
990 static void tegra_i2c_config_fifo_trig(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_config_fifo_trig() argument
998 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1003 if (i2c_dev->dma_mode) { in tegra_i2c_config_fifo_trig()
1011 if (i2c_dev->msg_read) { in tegra_i2c_config_fifo_trig()
1012 chan = i2c_dev->rx_dma_chan; in tegra_i2c_config_fifo_trig()
1013 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_RX_FIFO); in tegra_i2c_config_fifo_trig()
1015 slv_config.src_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
1019 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1024 chan = i2c_dev->tx_dma_chan; in tegra_i2c_config_fifo_trig()
1025 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_TX_FIFO); in tegra_i2c_config_fifo_trig()
1027 slv_config.dst_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
1031 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1040 dev_err(i2c_dev->dev, "DMA config failed: %d\n", err); in tegra_i2c_config_fifo_trig()
1041 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_config_fifo_trig()
1043 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_config_fifo_trig()
1044 i2c_dev->dma_mode = false; in tegra_i2c_config_fifo_trig()
1050 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1057 i2c_writel(i2c_dev, val, reg); in tegra_i2c_config_fifo_trig()
1060 static unsigned long tegra_i2c_poll_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_completion() argument
1068 u32 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_poll_completion()
1071 tegra_i2c_isr(i2c_dev->irq, i2c_dev); in tegra_i2c_poll_completion()
1086 static unsigned long tegra_i2c_wait_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_wait_completion() argument
1092 if (i2c_dev->atomic_mode) { in tegra_i2c_wait_completion()
1093 ret = tegra_i2c_poll_completion(i2c_dev, complete, timeout_ms); in tegra_i2c_wait_completion()
1095 enable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1098 disable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1111 ret = tegra_i2c_poll_completion(i2c_dev, complete, 0); in tegra_i2c_wait_completion()
1119 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_issue_bus_clear() local
1123 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_issue_bus_clear()
1127 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1129 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_issue_bus_clear()
1134 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1135 tegra_i2c_unmask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1137 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, 50); in tegra_i2c_issue_bus_clear()
1138 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1141 dev_err(i2c_dev->dev, "failed to clear bus\n"); in tegra_i2c_issue_bus_clear()
1145 val = i2c_readl(i2c_dev, I2C_BUS_CLEAR_STATUS); in tegra_i2c_issue_bus_clear()
1147 dev_err(i2c_dev->dev, "un-recovered arbitration lost\n"); in tegra_i2c_issue_bus_clear()
1154 static void tegra_i2c_push_packet_header(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_push_packet_header() argument
1158 u32 *dma_buf = i2c_dev->dma_buf; in tegra_i2c_push_packet_header()
1164 FIELD_PREP(PACKET_HEADER0_CONT_ID, i2c_dev->cont_id) | in tegra_i2c_push_packet_header()
1167 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1170 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1174 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1177 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1199 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1202 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1205 static int tegra_i2c_error_recover(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_error_recover() argument
1208 if (i2c_dev->msg_err == I2C_ERR_NONE) in tegra_i2c_error_recover()
1211 tegra_i2c_init(i2c_dev); in tegra_i2c_error_recover()
1214 if (i2c_dev->msg_err == I2C_ERR_ARBITRATION_LOST) { in tegra_i2c_error_recover()
1215 if (!i2c_dev->multimaster_mode) in tegra_i2c_error_recover()
1216 return i2c_recover_bus(&i2c_dev->adapter); in tegra_i2c_error_recover()
1221 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) { in tegra_i2c_error_recover()
1231 static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_xfer_msg() argument
1240 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_xfer_msg()
1244 i2c_dev->msg_buf = msg->buf; in tegra_i2c_xfer_msg()
1248 i2c_dev->msg_buf = msg->buf + 1; in tegra_i2c_xfer_msg()
1250 i2c_dev->msg_buf_remaining = msg->len; in tegra_i2c_xfer_msg()
1251 i2c_dev->msg_err = I2C_ERR_NONE; in tegra_i2c_xfer_msg()
1252 i2c_dev->msg_read = !!(msg->flags & I2C_M_RD); in tegra_i2c_xfer_msg()
1253 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_xfer_msg()
1255 if (i2c_dev->msg_read) in tegra_i2c_xfer_msg()
1262 i2c_dev->dma_mode = xfer_size > I2C_PIO_MODE_PREFERRED_LEN && in tegra_i2c_xfer_msg()
1263 i2c_dev->dma_buf && !i2c_dev->atomic_mode; in tegra_i2c_xfer_msg()
1265 tegra_i2c_config_fifo_trig(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1272 i2c_dev->timings.bus_freq_hz); in tegra_i2c_xfer_msg()
1275 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1277 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1278 if (i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1279 dma_sync_single_for_device(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1280 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1283 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1287 dma_sync_single_for_cpu(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1288 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1293 tegra_i2c_push_packet_header(i2c_dev, msg, end_state); in tegra_i2c_xfer_msg()
1295 if (!i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1296 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1297 memcpy(i2c_dev->dma_buf + I2C_PACKET_HEADER_SIZE, in tegra_i2c_xfer_msg()
1300 dma_sync_single_for_device(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1301 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1304 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1308 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_xfer_msg()
1312 if (i2c_dev->hw->has_per_pkt_xfer_complete_irq) in tegra_i2c_xfer_msg()
1315 if (!i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1318 else if (i2c_dev->msg_buf_remaining) in tegra_i2c_xfer_msg()
1322 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1323 dev_dbg(i2c_dev->dev, "unmasked IRQ: %02x\n", in tegra_i2c_xfer_msg()
1324 i2c_readl(i2c_dev, I2C_INT_MASK)); in tegra_i2c_xfer_msg()
1326 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1327 time_left = tegra_i2c_wait_completion(i2c_dev, in tegra_i2c_xfer_msg()
1328 &i2c_dev->dma_complete, in tegra_i2c_xfer_msg()
1336 dmaengine_synchronize(i2c_dev->msg_read ? in tegra_i2c_xfer_msg()
1337 i2c_dev->rx_dma_chan : in tegra_i2c_xfer_msg()
1338 i2c_dev->tx_dma_chan); in tegra_i2c_xfer_msg()
1340 dmaengine_terminate_sync(i2c_dev->msg_read ? in tegra_i2c_xfer_msg()
1341 i2c_dev->rx_dma_chan : in tegra_i2c_xfer_msg()
1342 i2c_dev->tx_dma_chan); in tegra_i2c_xfer_msg()
1344 if (!time_left && !completion_done(&i2c_dev->dma_complete)) { in tegra_i2c_xfer_msg()
1345 dev_err(i2c_dev->dev, "DMA transfer timed out\n"); in tegra_i2c_xfer_msg()
1346 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1350 if (i2c_dev->msg_read && i2c_dev->msg_err == I2C_ERR_NONE) { in tegra_i2c_xfer_msg()
1351 dma_sync_single_for_cpu(i2c_dev->dma_dev, in tegra_i2c_xfer_msg()
1352 i2c_dev->dma_phys, in tegra_i2c_xfer_msg()
1355 memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, msg->len); in tegra_i2c_xfer_msg()
1359 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, in tegra_i2c_xfer_msg()
1362 tegra_i2c_mask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1365 dev_err(i2c_dev->dev, "I2C transfer timed out\n"); in tegra_i2c_xfer_msg()
1366 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1370 dev_dbg(i2c_dev->dev, "transfer complete: %lu %d %d\n", in tegra_i2c_xfer_msg()
1371 time_left, completion_done(&i2c_dev->msg_complete), in tegra_i2c_xfer_msg()
1372 i2c_dev->msg_err); in tegra_i2c_xfer_msg()
1374 i2c_dev->dma_mode = false; in tegra_i2c_xfer_msg()
1376 err = tegra_i2c_error_recover(i2c_dev, msg); in tegra_i2c_xfer_msg()
1386 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer() local
1389 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_xfer()
1391 dev_err(i2c_dev->dev, "runtime resume failed %d\n", ret); in tegra_i2c_xfer()
1392 pm_runtime_put_noidle(i2c_dev->dev); in tegra_i2c_xfer()
1408 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], MSG_END_CONTINUE); in tegra_i2c_xfer()
1413 dev_dbg(i2c_dev->dev, "reading %d bytes\n", msgs[i].len); in tegra_i2c_xfer()
1415 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type); in tegra_i2c_xfer()
1420 pm_runtime_put(i2c_dev->dev); in tegra_i2c_xfer()
1428 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer_atomic() local
1431 i2c_dev->atomic_mode = true; in tegra_i2c_xfer_atomic()
1433 i2c_dev->atomic_mode = false; in tegra_i2c_xfer_atomic()
1440 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_func() local
1444 if (i2c_dev->hw->has_continue_xfer_support) in tegra_i2c_func()
1654 static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_parse_dt() argument
1656 struct device_node *np = i2c_dev->dev->of_node; in tegra_i2c_parse_dt()
1659 i2c_parse_fw_timings(i2c_dev->dev, &i2c_dev->timings, true); in tegra_i2c_parse_dt()
1661 multi_mode = device_property_read_bool(i2c_dev->dev, "multi-master"); in tegra_i2c_parse_dt()
1662 i2c_dev->multimaster_mode = multi_mode; in tegra_i2c_parse_dt()
1665 i2c_dev->is_dvc = true; in tegra_i2c_parse_dt()
1668 i2c_dev->is_vi = true; in tegra_i2c_parse_dt()
1671 static int tegra_i2c_init_reset(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_reset() argument
1673 if (ACPI_HANDLE(i2c_dev->dev)) in tegra_i2c_init_reset()
1676 i2c_dev->rst = devm_reset_control_get_exclusive(i2c_dev->dev, "i2c"); in tegra_i2c_init_reset()
1677 if (IS_ERR(i2c_dev->rst)) in tegra_i2c_init_reset()
1678 return dev_err_probe(i2c_dev->dev, PTR_ERR(i2c_dev->rst), in tegra_i2c_init_reset()
1684 static int tegra_i2c_init_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_clocks() argument
1688 if (ACPI_HANDLE(i2c_dev->dev)) in tegra_i2c_init_clocks()
1691 i2c_dev->clocks[i2c_dev->nclocks++].id = "div-clk"; in tegra_i2c_init_clocks()
1693 if (i2c_dev->hw == &tegra20_i2c_hw || i2c_dev->hw == &tegra30_i2c_hw) in tegra_i2c_init_clocks()
1694 i2c_dev->clocks[i2c_dev->nclocks++].id = "fast-clk"; in tegra_i2c_init_clocks()
1696 if (i2c_dev->is_vi) in tegra_i2c_init_clocks()
1697 i2c_dev->clocks[i2c_dev->nclocks++].id = "slow"; in tegra_i2c_init_clocks()
1699 err = devm_clk_bulk_get(i2c_dev->dev, i2c_dev->nclocks, in tegra_i2c_init_clocks()
1700 i2c_dev->clocks); in tegra_i2c_init_clocks()
1704 err = clk_bulk_prepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1708 i2c_dev->div_clk = i2c_dev->clocks[0].clk; in tegra_i2c_init_clocks()
1710 if (!i2c_dev->multimaster_mode) in tegra_i2c_init_clocks()
1713 err = clk_enable(i2c_dev->div_clk); in tegra_i2c_init_clocks()
1715 dev_err(i2c_dev->dev, "failed to enable div-clk: %d\n", err); in tegra_i2c_init_clocks()
1722 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1727 static void tegra_i2c_release_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_clocks() argument
1729 if (i2c_dev->multimaster_mode) in tegra_i2c_release_clocks()
1730 clk_disable(i2c_dev->div_clk); in tegra_i2c_release_clocks()
1732 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_release_clocks()
1735 static int tegra_i2c_init_hardware(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_hardware() argument
1739 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_init_hardware()
1741 dev_err(i2c_dev->dev, "runtime resume failed: %d\n", ret); in tegra_i2c_init_hardware()
1743 ret = tegra_i2c_init(i2c_dev); in tegra_i2c_init_hardware()
1745 pm_runtime_put_sync(i2c_dev->dev); in tegra_i2c_init_hardware()
1752 struct tegra_i2c_dev *i2c_dev; in tegra_i2c_probe() local
1756 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in tegra_i2c_probe()
1757 if (!i2c_dev) in tegra_i2c_probe()
1760 platform_set_drvdata(pdev, i2c_dev); in tegra_i2c_probe()
1762 init_completion(&i2c_dev->msg_complete); in tegra_i2c_probe()
1763 init_completion(&i2c_dev->dma_complete); in tegra_i2c_probe()
1765 i2c_dev->hw = device_get_match_data(&pdev->dev); in tegra_i2c_probe()
1766 i2c_dev->cont_id = pdev->id; in tegra_i2c_probe()
1767 i2c_dev->dev = &pdev->dev; in tegra_i2c_probe()
1769 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in tegra_i2c_probe()
1770 if (IS_ERR(i2c_dev->base)) in tegra_i2c_probe()
1771 return PTR_ERR(i2c_dev->base); in tegra_i2c_probe()
1773 i2c_dev->base_phys = res->start; in tegra_i2c_probe()
1779 i2c_dev->irq = err; in tegra_i2c_probe()
1782 irq_set_status_flags(i2c_dev->irq, IRQ_NOAUTOEN); in tegra_i2c_probe()
1784 err = devm_request_threaded_irq(i2c_dev->dev, i2c_dev->irq, in tegra_i2c_probe()
1787 dev_name(i2c_dev->dev), i2c_dev); in tegra_i2c_probe()
1791 tegra_i2c_parse_dt(i2c_dev); in tegra_i2c_probe()
1793 err = tegra_i2c_init_reset(i2c_dev); in tegra_i2c_probe()
1797 err = tegra_i2c_init_clocks(i2c_dev); in tegra_i2c_probe()
1801 err = tegra_i2c_init_dma(i2c_dev); in tegra_i2c_probe()
1814 if (!i2c_dev->is_vi) in tegra_i2c_probe()
1815 pm_runtime_irq_safe(i2c_dev->dev); in tegra_i2c_probe()
1817 pm_runtime_enable(i2c_dev->dev); in tegra_i2c_probe()
1819 err = tegra_i2c_init_hardware(i2c_dev); in tegra_i2c_probe()
1823 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev); in tegra_i2c_probe()
1824 i2c_dev->adapter.dev.of_node = i2c_dev->dev->of_node; in tegra_i2c_probe()
1825 i2c_dev->adapter.dev.parent = i2c_dev->dev; in tegra_i2c_probe()
1826 i2c_dev->adapter.retries = 1; in tegra_i2c_probe()
1827 i2c_dev->adapter.timeout = 6 * HZ; in tegra_i2c_probe()
1828 i2c_dev->adapter.quirks = i2c_dev->hw->quirks; in tegra_i2c_probe()
1829 i2c_dev->adapter.owner = THIS_MODULE; in tegra_i2c_probe()
1830 i2c_dev->adapter.class = I2C_CLASS_DEPRECATED; in tegra_i2c_probe()
1831 i2c_dev->adapter.algo = &tegra_i2c_algo; in tegra_i2c_probe()
1832 i2c_dev->adapter.nr = pdev->id; in tegra_i2c_probe()
1833 ACPI_COMPANION_SET(&i2c_dev->adapter.dev, ACPI_COMPANION(&pdev->dev)); in tegra_i2c_probe()
1835 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_probe()
1836 i2c_dev->adapter.bus_recovery_info = &tegra_i2c_recovery_info; in tegra_i2c_probe()
1838 strscpy(i2c_dev->adapter.name, dev_name(i2c_dev->dev), in tegra_i2c_probe()
1839 sizeof(i2c_dev->adapter.name)); in tegra_i2c_probe()
1841 err = i2c_add_numbered_adapter(&i2c_dev->adapter); in tegra_i2c_probe()
1848 pm_runtime_disable(i2c_dev->dev); in tegra_i2c_probe()
1850 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_probe()
1852 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_probe()
1859 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev); in tegra_i2c_remove() local
1861 i2c_del_adapter(&i2c_dev->adapter); in tegra_i2c_remove()
1862 pm_runtime_force_suspend(i2c_dev->dev); in tegra_i2c_remove()
1864 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_remove()
1865 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_remove()
1872 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_resume() local
1879 err = clk_bulk_enable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1888 if (i2c_dev->is_vi) { in tegra_i2c_runtime_resume()
1889 err = tegra_i2c_init(i2c_dev); in tegra_i2c_runtime_resume()
1897 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1904 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_suspend() local
1906 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_suspend()
1913 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_suspend() local
1916 i2c_mark_adapter_suspended(&i2c_dev->adapter); in tegra_i2c_suspend()
1929 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_resume() local
1940 err = tegra_i2c_init(i2c_dev); in tegra_i2c_resume()
1955 i2c_mark_adapter_resumed(&i2c_dev->adapter); in tegra_i2c_resume()