Lines Matching refs:adc_dev

66 static u32 get_adc_step_mask(struct tiadc_device *adc_dev)  in get_adc_step_mask()  argument
70 step_en = ((1 << adc_dev->channels) - 1); in get_adc_step_mask()
71 step_en <<= TOTAL_STEPS - adc_dev->channels + 1; in get_adc_step_mask()
75 static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev, in get_adc_chan_step_mask() argument
80 for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) { in get_adc_chan_step_mask()
81 if (chan->channel == adc_dev->channel_line[i]) { in get_adc_chan_step_mask()
84 step = adc_dev->channel_step[i]; in get_adc_chan_step_mask()
93 static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan) in get_adc_step_bit() argument
95 return 1 << adc_dev->channel_step[chan]; in get_adc_step_bit()
98 static int tiadc_wait_idle(struct tiadc_device *adc_dev) in tiadc_wait_idle() argument
102 return readl_poll_timeout(adc_dev->mfd_tscadc->tscadc_base + REG_ADCFSM, in tiadc_wait_idle()
104 IDLE_TIMEOUT_MS * 1000 * adc_dev->channels); in tiadc_wait_idle()
109 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_step_config() local
122 for (i = 0; i < adc_dev->channels; i++) { in tiadc_step_config()
125 chan = adc_dev->channel_line[i]; in tiadc_step_config()
127 if (adc_dev->step_avg[i]) in tiadc_step_config()
128 stepconfig = STEPCONFIG_AVG(ffs(adc_dev->step_avg[i]) - 1) | in tiadc_step_config()
136 tiadc_writel(adc_dev, REG_STEPCONFIG(steps), in tiadc_step_config()
141 tiadc_writel(adc_dev, REG_STEPDELAY(steps), in tiadc_step_config()
142 STEPDELAY_OPEN(adc_dev->open_delay[i]) | in tiadc_step_config()
143 STEPDELAY_SAMPLE(adc_dev->sample_delay[i])); in tiadc_step_config()
145 adc_dev->channel_step[i] = steps; in tiadc_step_config()
153 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_irq_h() local
157 status = tiadc_readl(adc_dev, REG_IRQSTATUS); in tiadc_irq_h()
165 config = tiadc_readl(adc_dev, REG_CTRL); in tiadc_irq_h()
167 tiadc_writel(adc_dev, REG_CTRL, config); in tiadc_irq_h()
168 tiadc_writel(adc_dev, REG_IRQSTATUS, in tiadc_irq_h()
178 adc_fsm = tiadc_readl(adc_dev, REG_ADCFSM); in tiadc_irq_h()
181 tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_SSENB)); in tiadc_irq_h()
185 tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES); in tiadc_irq_h()
195 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_worker_h() local
197 u16 *data = adc_dev->data; in tiadc_worker_h()
199 fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT); in tiadc_worker_h()
202 read = tiadc_readl(adc_dev, REG_FIFO1); in tiadc_worker_h()
208 tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES); in tiadc_worker_h()
209 tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES); in tiadc_worker_h()
217 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_dma_rx_complete() local
218 struct tiadc_dma *dma = &adc_dev->dma; in tiadc_dma_rx_complete()
233 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_start_dma() local
234 struct tiadc_dma *dma = &adc_dev->dma; in tiadc_start_dma()
247 adc_dev->total_ch_enabled) - 1; in tiadc_start_dma()
270 tiadc_writel(adc_dev, REG_FIFO1THR, dma->fifo_thresh); in tiadc_start_dma()
271 tiadc_writel(adc_dev, REG_DMA1REQ, dma->fifo_thresh); in tiadc_start_dma()
272 tiadc_writel(adc_dev, REG_DMAENABLE_SET, DMA_FIFO1); in tiadc_start_dma()
279 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_buffer_preenable() local
283 ret = tiadc_wait_idle(adc_dev); in tiadc_buffer_preenable()
287 tiadc_writel(adc_dev, REG_IRQCLR, in tiadc_buffer_preenable()
292 fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT); in tiadc_buffer_preenable()
294 tiadc_readl(adc_dev, REG_FIFO1); in tiadc_buffer_preenable()
301 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_buffer_postenable() local
302 struct tiadc_dma *dma = &adc_dev->dma; in tiadc_buffer_postenable()
308 for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels) { in tiadc_buffer_postenable()
309 enb |= (get_adc_step_bit(adc_dev, bit) << 1); in tiadc_buffer_postenable()
310 adc_dev->total_ch_enabled++; in tiadc_buffer_postenable()
312 adc_dev->buffer_en_ch_steps = enb; in tiadc_buffer_postenable()
317 am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb); in tiadc_buffer_postenable()
319 tiadc_writel(adc_dev, REG_IRQSTATUS, in tiadc_buffer_postenable()
326 tiadc_writel(adc_dev, REG_IRQENABLE, irq_enable); in tiadc_buffer_postenable()
333 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_buffer_predisable() local
334 struct tiadc_dma *dma = &adc_dev->dma; in tiadc_buffer_predisable()
337 tiadc_writel(adc_dev, REG_IRQCLR, in tiadc_buffer_predisable()
340 am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps); in tiadc_buffer_predisable()
341 adc_dev->buffer_en_ch_steps = 0; in tiadc_buffer_predisable()
342 adc_dev->total_ch_enabled = 0; in tiadc_buffer_predisable()
344 tiadc_writel(adc_dev, REG_DMAENABLE_CLEAR, 0x2); in tiadc_buffer_predisable()
349 fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT); in tiadc_buffer_predisable()
351 tiadc_readl(adc_dev, REG_FIFO1); in tiadc_buffer_predisable()
401 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_channel_init() local
416 chan->channel = adc_dev->channel_line[i]; in tiadc_channel_init()
435 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_read_raw() local
463 step_en = get_adc_chan_step_mask(adc_dev, chan); in tiadc_read_raw()
467 mutex_lock(&adc_dev->fifo1_lock); in tiadc_read_raw()
469 ret = tiadc_wait_idle(adc_dev); in tiadc_read_raw()
473 fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT); in tiadc_read_raw()
475 tiadc_readl(adc_dev, REG_FIFO1); in tiadc_read_raw()
477 am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en); in tiadc_read_raw()
480 timeout = jiffies + msecs_to_jiffies(IDLE_TIMEOUT_MS * adc_dev->channels); in tiadc_read_raw()
482 fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT); in tiadc_read_raw()
487 am335x_tsc_se_adc_done(adc_dev->mfd_tscadc); in tiadc_read_raw()
493 map_val = adc_dev->channel_step[chan->scan_index]; in tiadc_read_raw()
503 read = tiadc_readl(adc_dev, REG_FIFO1); in tiadc_read_raw()
514 am335x_tsc_se_adc_done(adc_dev->mfd_tscadc); in tiadc_read_raw()
520 mutex_unlock(&adc_dev->fifo1_lock); in tiadc_read_raw()
529 struct tiadc_device *adc_dev) in tiadc_request_dma() argument
531 struct tiadc_dma *dma = &adc_dev->dma; in tiadc_request_dma()
537 dma->conf.src_addr = adc_dev->mfd_tscadc->tscadc_phys_base + REG_FIFO1; in tiadc_request_dma()
543 dma->chan = dma_request_chan(adc_dev->mfd_tscadc->dev, "fifo1"); in tiadc_request_dma()
565 struct tiadc_device *adc_dev) in tiadc_parse_dt() argument
575 adc_dev->channel_line[channels] = val; in tiadc_parse_dt()
578 adc_dev->open_delay[channels] = STEPCONFIG_OPENDLY; in tiadc_parse_dt()
579 adc_dev->sample_delay[channels] = STEPCONFIG_SAMPLEDLY; in tiadc_parse_dt()
580 adc_dev->step_avg[channels] = 16; in tiadc_parse_dt()
585 adc_dev->channels = channels; in tiadc_parse_dt()
588 adc_dev->step_avg, channels); in tiadc_parse_dt()
590 adc_dev->open_delay, channels); in tiadc_parse_dt()
592 adc_dev->sample_delay, channels); in tiadc_parse_dt()
594 for (i = 0; i < adc_dev->channels; i++) { in tiadc_parse_dt()
597 chan = adc_dev->channel_line[i]; in tiadc_parse_dt()
599 if (adc_dev->step_avg[i] > STEPCONFIG_AVG_16) { in tiadc_parse_dt()
603 adc_dev->step_avg[i] = STEPCONFIG_AVG_16; in tiadc_parse_dt()
606 if (adc_dev->open_delay[i] > STEPCONFIG_MAX_OPENDLY) { in tiadc_parse_dt()
610 adc_dev->open_delay[i] = STEPCONFIG_MAX_OPENDLY; in tiadc_parse_dt()
613 if (adc_dev->sample_delay[i] > STEPCONFIG_MAX_SAMPLE) { in tiadc_parse_dt()
617 adc_dev->sample_delay[i] = STEPCONFIG_MAX_SAMPLE; in tiadc_parse_dt()
627 struct tiadc_device *adc_dev; in tiadc_probe() local
636 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc_dev)); in tiadc_probe()
641 adc_dev = iio_priv(indio_dev); in tiadc_probe()
643 adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev); in tiadc_probe()
644 tiadc_parse_dt(pdev, adc_dev); in tiadc_probe()
651 tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD); in tiadc_probe()
652 mutex_init(&adc_dev->fifo1_lock); in tiadc_probe()
654 err = tiadc_channel_init(&pdev->dev, indio_dev, adc_dev->channels); in tiadc_probe()
661 adc_dev->mfd_tscadc->irq, in tiadc_probe()
673 err = tiadc_request_dma(pdev, adc_dev); in tiadc_probe()
688 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_remove() local
689 struct tiadc_dma *dma = &adc_dev->dma; in tiadc_remove()
699 step_en = get_adc_step_mask(adc_dev); in tiadc_remove()
700 am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en); in tiadc_remove()
708 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_suspend() local
711 idle = tiadc_readl(adc_dev, REG_CTRL); in tiadc_suspend()
713 tiadc_writel(adc_dev, REG_CTRL, idle | CNTRLREG_POWERDOWN); in tiadc_suspend()
721 struct tiadc_device *adc_dev = iio_priv(indio_dev); in tiadc_resume() local
725 restore = tiadc_readl(adc_dev, REG_CTRL); in tiadc_resume()
727 tiadc_writel(adc_dev, REG_CTRL, restore); in tiadc_resume()
730 am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, in tiadc_resume()
731 adc_dev->buffer_en_ch_steps); in tiadc_resume()