Lines Matching refs:reg_offset
533 int reg_offset; member
547 .reg_offset = 0,
555 .reg_offset = 0,
563 .reg_offset = 1,
571 .reg_offset = 1,
578 .reg_offset = 1,
585 .reg_offset = 1,
592 .reg_offset = 1,
601 .reg_offset = 2,
608 .reg_offset = 2,
616 .reg_offset = 2,
624 .reg_offset = 0,
632 .reg_offset = 0,
640 .reg_offset = 1,
648 .reg_offset = 1,
656 .reg_offset = 2,
664 .reg_offset = 0,
672 .reg_offset = 0,
679 .reg_offset = 0,
686 .reg_offset = 0,
693 .reg_offset = 0,
700 .reg_offset = 0,
707 .reg_offset = 0,
715 .reg_offset = 1,
724 .reg_offset = 1,
733 .reg_offset = 1,
742 .reg_offset = 2,
750 .reg_offset = 2,
758 .reg_offset = 2,
766 .reg_offset = 3,
774 .reg_offset = 3,
783 .reg_offset = 0,
792 .reg_offset = 0,
801 .reg_offset = 0,
811 .reg_offset = 1,
820 .reg_offset = 1,
828 .reg_offset = 0,
836 .reg_offset = 0,
844 .reg_offset = 0,
852 .reg_offset = 0,
860 .reg_offset = 1,
868 .reg_offset = 1,
876 .reg_offset = 0,
885 .reg_offset = 0,
893 .reg_offset = 0,
902 .reg_offset = 0,
910 .reg_offset = 0,
918 .reg_offset = 1,
926 .reg_offset = 1,
935 .reg_offset = 9,
945 .reg_offset = 9,
955 .reg_offset = 9,
965 .reg_offset = 9,
975 .reg_offset = 10,
985 .reg_offset = 10,
995 .reg_offset = 10,
1005 .reg_offset = 10,
1014 .reg_offset = 0,
1021 .reg_offset = 1,
1030 .reg_offset = 2,
1038 .reg_offset = 3,
1046 .reg_offset = 4,
1055 .reg_offset = 5,
1063 .reg_offset = 6,
1072 .reg_offset = 7,
1080 .reg_offset = 8,
1685 int reg_offset = iqs7222_props[i].reg_offset; in iqs7222_parse_props() local
1710 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
1712 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
1720 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
1722 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
1743 setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1, in iqs7222_parse_props()
1745 setup[reg_offset] |= (val / val_pitch << reg_shift); in iqs7222_parse_props()
2063 int count, error, reg_offset, i; in iqs7222_parse_sldr() local
2098 reg_offset = dev_desc->sldr_res < U16_MAX ? 0 : 1; in iqs7222_parse_sldr()
2101 sldr_setup[3 + reg_offset] &= ~GENMASK(ext_chan - 1, 0); in iqs7222_parse_sldr()
2104 sldr_setup[5 + reg_offset + i] = 0; in iqs7222_parse_sldr()
2118 sldr_setup[3 + reg_offset] |= BIT(chan_sel[i]); in iqs7222_parse_sldr()
2119 sldr_setup[5 + reg_offset + i] = chan_sel[i] * 42 + 1080; in iqs7222_parse_sldr()
2122 sldr_setup[4 + reg_offset] = dev_desc->touch_link; in iqs7222_parse_sldr()
2124 sldr_setup[4 + reg_offset] -= 2; in iqs7222_parse_sldr()
2134 if (reg_offset) { in iqs7222_parse_sldr()
2147 if (!(reg_offset ? sldr_setup[3] in iqs7222_parse_sldr()
2156 if (val > (reg_offset ? U16_MAX : U8_MAX * 4)) { in iqs7222_parse_sldr()
2162 if (reg_offset) { in iqs7222_parse_sldr()
2178 if (!reg_offset) { in iqs7222_parse_sldr()
2206 if (!reg_offset) in iqs7222_parse_sldr()
2223 if (reg_offset) in iqs7222_parse_sldr()
2242 : sldr_setup[3 + reg_offset], in iqs7222_parse_sldr()
2244 : sldr_setup[4 + reg_offset], in iqs7222_parse_sldr()
2251 if (!reg_offset) in iqs7222_parse_sldr()
2262 if (i && !reg_offset) in iqs7222_parse_sldr()
2264 else if (sldr_setup[4 + reg_offset] == dev_desc->touch_link) in iqs7222_parse_sldr()