Lines Matching refs:smmu_domain
62 struct arm_smmu_domain *smmu_domain = (void *)cookie; in qcom_adreno_smmu_get_fault_info() local
63 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_get_fault_info()
64 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_get_fault_info()
77 struct arm_smmu_domain *smmu_domain = (void *)cookie; in qcom_adreno_smmu_set_stall() local
78 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_set_stall()
79 struct qcom_smmu *qsmmu = to_qcom_smmu(smmu_domain->smmu); in qcom_adreno_smmu_set_stall()
89 struct arm_smmu_domain *smmu_domain = (void *)cookie; in qcom_adreno_smmu_resume_translation() local
90 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_resume_translation()
91 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_resume_translation()
124 struct arm_smmu_domain *smmu_domain = (void *)cookie; in qcom_adreno_smmu_get_ttbr1_cfg() local
126 io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops); in qcom_adreno_smmu_get_ttbr1_cfg()
139 struct arm_smmu_domain *smmu_domain = (void *)cookie; in qcom_adreno_smmu_set_ttbr0_cfg() local
140 struct io_pgtable *pgtable = io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops); in qcom_adreno_smmu_set_ttbr0_cfg()
141 struct arm_smmu_cfg *cfg = &smmu_domain->cfg; in qcom_adreno_smmu_set_ttbr0_cfg()
142 struct arm_smmu_cb *cb = &smmu_domain->smmu->cbs[cfg->cbndx]; in qcom_adreno_smmu_set_ttbr0_cfg()
172 arm_smmu_write_context_bank(smmu_domain->smmu, cb->cfg->cbndx); in qcom_adreno_smmu_set_ttbr0_cfg()
177 static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain, in qcom_adreno_smmu_alloc_context_bank() argument
208 static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain, in qcom_adreno_smmu_init_context() argument
213 smmu_domain->cfg.flush_walk_prefer_tlbiasid = true; in qcom_adreno_smmu_init_context()
224 if (qcom_adreno_can_do_ttbr1(smmu_domain->smmu) && in qcom_adreno_smmu_init_context()
225 (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) && in qcom_adreno_smmu_init_context()
226 (smmu_domain->cfg.fmt == ARM_SMMU_CTX_FMT_AARCH64)) in qcom_adreno_smmu_init_context()
234 priv->cookie = smmu_domain; in qcom_adreno_smmu_init_context()
261 static int qcom_smmu_init_context(struct arm_smmu_domain *smmu_domain, in qcom_smmu_init_context() argument
264 smmu_domain->cfg.flush_walk_prefer_tlbiasid = true; in qcom_smmu_init_context()