Lines Matching refs:hwirq
44 writel(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_ack()
58 writel(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_eoi()
68 val = readl_relaxed(data->base + EIMASK) | BIT(d->hwirq); in exiu_irq_mask()
78 val = readl_relaxed(data->base + EIMASK) & ~BIT(d->hwirq); in exiu_irq_unmask()
89 writel_relaxed(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_enable()
91 val = readl_relaxed(data->base + EIMASK) & ~BIT(d->hwirq); in exiu_irq_enable()
103 val |= BIT(d->hwirq); in exiu_irq_set_type()
105 val &= ~BIT(d->hwirq); in exiu_irq_set_type()
110 val &= ~BIT(d->hwirq); in exiu_irq_set_type()
113 val |= BIT(d->hwirq); in exiu_irq_set_type()
118 writel_relaxed(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_set_type()
140 unsigned long *hwirq, in exiu_domain_translate() argument
152 *hwirq = fwspec->param[1] - info->spi_base; in exiu_domain_translate()
157 *hwirq = fwspec->param[0]; in exiu_domain_translate()
169 irq_hw_number_t hwirq; in exiu_domain_alloc() local
178 hwirq = fwspec->param[1] - info->spi_base; in exiu_domain_alloc()
180 hwirq = fwspec->param[0]; in exiu_domain_alloc()
181 parent_fwspec.param[0] = hwirq + info->spi_base + 32; in exiu_domain_alloc()
184 irq_domain_set_hwirq_and_chip(dom, virq, hwirq, &exiu_irq_chip, info); in exiu_domain_alloc()