Lines Matching refs:gc
31 static inline void ab_irqctl_writereg(struct irq_chip_generic *gc, u32 reg, in ab_irqctl_writereg() argument
34 irq_reg_writel(gc, val, reg); in ab_irqctl_writereg()
37 static inline u32 ab_irqctl_readreg(struct irq_chip_generic *gc, u32 reg) in ab_irqctl_readreg() argument
39 return irq_reg_readl(gc, reg); in ab_irqctl_readreg()
44 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); in tb10x_irq_set_type() local
49 irq_gc_lock(gc); in tb10x_irq_set_type()
51 mod = ab_irqctl_readreg(gc, AB_IRQCTL_SRC_MODE) | im; in tb10x_irq_set_type()
52 pol = ab_irqctl_readreg(gc, AB_IRQCTL_SRC_POLARITY) | im; in tb10x_irq_set_type()
71 irq_gc_unlock(gc); in tb10x_irq_set_type()
80 ab_irqctl_writereg(gc, AB_IRQCTL_SRC_MODE, mod); in tb10x_irq_set_type()
81 ab_irqctl_writereg(gc, AB_IRQCTL_SRC_POLARITY, pol); in tb10x_irq_set_type()
82 ab_irqctl_writereg(gc, AB_IRQCTL_INT_STATUS, im); in tb10x_irq_set_type()
84 irq_gc_unlock(gc); in tb10x_irq_set_type()
102 struct irq_chip_generic *gc; in of_tb10x_init_irq() local
144 gc = domain->gc->gc[0]; in of_tb10x_init_irq()
145 gc->reg_base = reg_base; in of_tb10x_init_irq()
147 gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; in of_tb10x_init_irq()
148 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in of_tb10x_init_irq()
149 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in of_tb10x_init_irq()
150 gc->chip_types[0].chip.irq_set_type = tb10x_irq_set_type; in of_tb10x_init_irq()
151 gc->chip_types[0].regs.mask = AB_IRQCTL_INT_ENABLE; in of_tb10x_init_irq()
153 gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; in of_tb10x_init_irq()
154 gc->chip_types[1].chip.name = gc->chip_types[0].chip.name; in of_tb10x_init_irq()
155 gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit; in of_tb10x_init_irq()
156 gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit; in of_tb10x_init_irq()
157 gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit; in of_tb10x_init_irq()
158 gc->chip_types[1].chip.irq_set_type = tb10x_irq_set_type; in of_tb10x_init_irq()
159 gc->chip_types[1].regs.ack = AB_IRQCTL_INT_STATUS; in of_tb10x_init_irq()
160 gc->chip_types[1].regs.mask = AB_IRQCTL_INT_ENABLE; in of_tb10x_init_irq()
161 gc->chip_types[1].handler = handle_edge_irq; in of_tb10x_init_irq()
170 ab_irqctl_writereg(gc, AB_IRQCTL_INT_ENABLE, 0); in of_tb10x_init_irq()
171 ab_irqctl_writereg(gc, AB_IRQCTL_INT_MODE, 0); in of_tb10x_init_irq()
172 ab_irqctl_writereg(gc, AB_IRQCTL_INT_POLARITY, 0); in of_tb10x_init_irq()
173 ab_irqctl_writereg(gc, AB_IRQCTL_INT_STATUS, ~0UL); in of_tb10x_init_irq()