Lines Matching refs:ts1
2134 struct cx23885_tsport *ts1 = &dev->ts1; in cx23885_card_setup() local
2197 ts1->gen_ctrl_val = 0x4; /* Parallel */ in cx23885_card_setup()
2198 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2199 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2214 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ in cx23885_card_setup()
2215 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2216 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2222 ts1->gen_ctrl_val = 0x10e; in cx23885_card_setup()
2223 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2224 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2227 ts1->vld_misc_val = 0x2000; in cx23885_card_setup()
2228 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc); in cx23885_card_setup()
2237 ts1->gen_ctrl_val = 0x4; /* Parallel */ in cx23885_card_setup()
2238 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2239 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2249 ts1->gen_ctrl_val = 0x5; /* Parallel */ in cx23885_card_setup()
2250 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2251 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2256 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ in cx23885_card_setup()
2257 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2258 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2265 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ in cx23885_card_setup()
2266 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2267 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2276 ts1->gen_ctrl_val = 0x5; /* Parallel */ in cx23885_card_setup()
2277 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2278 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2281 ts1->gen_ctrl_val = 0x5; /* Parallel */ in cx23885_card_setup()
2282 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2283 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2289 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ in cx23885_card_setup()
2290 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2291 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2297 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ in cx23885_card_setup()
2298 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2299 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2303 ts1->gen_ctrl_val = 0x5; /* Parallel */ in cx23885_card_setup()
2304 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2305 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2311 ts1->gen_ctrl_val = 0x5; /* Parallel */ in cx23885_card_setup()
2312 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2313 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2320 ts1->gen_ctrl_val = 0x5; /* Parallel */ in cx23885_card_setup()
2321 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2322 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()
2332 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ in cx23885_card_setup()
2333 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ in cx23885_card_setup()
2334 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; in cx23885_card_setup()