Lines Matching refs:iowrite32
40 iowrite32((tmp << 17) | IIC_READ, addr + IIC_CSR2); in read_i2c_reg()
47 iowrite32(DIRECT_ABORT, addr + IIC_CSR1); in read_i2c_reg()
70 iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2); in write_i2c_reg()
76 iowrite32(DIRECT_ABORT, addr + IIC_CSR1); in write_i2c_reg()
96 iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2); in write_i2c_reg_nowait()
116 iowrite32(DIRECT_ABORT, addr + IIC_CSR1); in wait_i2c_reg()
156 iowrite32(dma_addr, pd->regs + EVEN_DMA_START); in dt3155_start_streaming()
157 iowrite32(dma_addr + pd->width, pd->regs + ODD_DMA_START); in dt3155_start_streaming()
158 iowrite32(pd->width, pd->regs + EVEN_DMA_STRIDE); in dt3155_start_streaming()
159 iowrite32(pd->width, pd->regs + ODD_DMA_STRIDE); in dt3155_start_streaming()
161 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START | in dt3155_start_streaming()
163 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | in dt3155_start_streaming()
184 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | in dt3155_stop_streaming()
187 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR); in dt3155_stop_streaming()
246 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START, in dt3155_irq_handler_even()
252 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN | in dt3155_irq_handler_even()
269 iowrite32(dma_addr, ipd->regs + EVEN_DMA_START); in dt3155_irq_handler_even()
270 iowrite32(dma_addr + ipd->width, ipd->regs + ODD_DMA_START); in dt3155_irq_handler_even()
271 iowrite32(ipd->width, ipd->regs + EVEN_DMA_STRIDE); in dt3155_irq_handler_even()
272 iowrite32(ipd->width, ipd->regs + ODD_DMA_STRIDE); in dt3155_irq_handler_even()
276 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START | in dt3155_irq_handler_even()
418 iowrite32(ADDR_ERR_ODD | ADDR_ERR_EVEN | FLD_CRPT_ODD | FLD_CRPT_EVEN | in dt3155_init_board()
423 iowrite32(FIFO_EN | SRST, pd->regs + CSR1); in dt3155_init_board()
424 iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT); in dt3155_init_board()
425 iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT); in dt3155_init_board()
426 iowrite32(0x00000020, pd->regs + FIFO_TRIGGER); in dt3155_init_board()
427 iowrite32(0x00000103, pd->regs + XFER_MODE); in dt3155_init_board()
428 iowrite32(0, pd->regs + RETRY_WAIT_CNT); in dt3155_init_board()
429 iowrite32(0, pd->regs + INT_CSR); in dt3155_init_board()
430 iowrite32(1, pd->regs + EVEN_FLD_MASK); in dt3155_init_board()
431 iowrite32(1, pd->regs + ODD_FLD_MASK); in dt3155_init_board()
432 iowrite32(0, pd->regs + MASK_LENGTH); in dt3155_init_board()
433 iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT); in dt3155_init_board()
434 iowrite32(0x01010101, pd->regs + IIC_CLK_DUR); in dt3155_init_board()
473 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, in dt3155_init_board()